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SL74HC367

System Logic Semiconductor

Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections

SL74HC367 Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections High-Performance Silicon-Gate CMOS The...


System Logic Semiconductor

SL74HC367

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Description
SL74HC367 Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections High-Performance Silicon-Gate CMOS The SL74HC367 is identical in pinout to the LS/ALS367. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device is arranged into 2-Bit and 4-Bit sections, each having its own active-low Output Enable. When either of the enables is high, the affected buffer outputs are placed into high-impedance states. The SL74HC367 has noninverting outputs. Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION SL74HC367N Plastic SL74HC367D SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Enable 1,Enable 2 L L H PIN 16 =VCC PIN 8 = GND Z = high impedance X = don’t care A L H X Output Y L H Z SLS System Logic Semiconductor SL74HC367 MAXIMUM RATINGS * Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0....




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