Octal D Flip-Flop with Common Clock and Reset(High-Performance Silicon-Gate CMOS)
SL74HCT273
Octal D Flip-Flop with Common Clock and Reset
High-Performance Silicon-Gate CMOS
The SL74HCT273 is identical...
Description
SL74HCT273
Octal D Flip-Flop with Common Clock and Reset
High-Performance Silicon-Gate CMOS
The SL74HCT273 is identical in pinout to the LS/ALS273. The SL74HCT273 may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs. This device consists of eight D flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-to-high transition of the Clock input. Reset is asynchronous and active low. TTL/NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 µA
ORDERING INFORMATION SL74HCT273N Plastic SL74HCT273D SOIC TA = -55° to 125° C for all packages
PIN ASSIGNMENT LOGIC DIAGRAM
FUNCTION TABLE
PIN 20=VCC PIN 10 = GND Reset L H H H H X = don’t care L Inputs Clock X D X H L X X Output Q L H L no change no change
SLS
System Logic Semiconductor
SL74HCT273
MAXIMUM RATINGS *
Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL
*
Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Value -0.5 to +7.0 -1.5 to VCC +1.5 -0.5 to VCC +0.5 ±20 ±35 ±75 750 500 -65 to +150 260
Unit V V V mA mA mA mW °C °C
Maximum Ratings are those value...
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