SL74HCT373

SL74HCT373 Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS The SL74HCT373 may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs. The SL74HCT373 is identical in pinout to the LS/ALS373. The eight latches of the SL74HCT373 are transparent D -type latches. While the Latch Enable is high the Q outputs follow the Data Inputs. When Latch Enable is taken low, data meeting the setup and hold times becomes latched. The Output Enable does not affect the state of the latch, but when Output Enable is high, all outputs are forced to the high-impedance state. Thus, data may be latched even when the outputs are not enabled. TTL/NMOS-Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 µA ORDERING INFORMATION SL74HCT373N Plastic SL74HCT373D SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Output Enable L PIN 20=VCC PIN 10 = GND L L H Latch Enable H H L X D H L X X Output Q H L No Change Z X = Don’t Care Z = High Impedance System Logic Semiconductor SLS SL74HCT373 MAXIMUM RATINGS * Symbol VCC VIN VOUT IIN IOUT ICC PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Plastic DIP+ ...