IDT74LVC125A

IDT74LVC125A 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 3.3V ± 0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range CMOS power levels (0.4µ W typ. static) Rail-to-Rail output swing for increased noise margin All inputs, outputs, and I/Os are 5V tolerant Supports hot insertion Available in SOIC, SSOP, and TSSOP packages IDT74LVC125A FEATURES: DESCRIPTION: DRIVE FEATURES: APPLICATIONS: The LVC125A quadruple bus buffer gate is built using advanced dual metal CMOS technology. The LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the associated outputenable (OE) input is high. To ensure the high impedance state during power up or power down, OE should be tied to Vcc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of this device as a translator in a mixed 3.3V/5V system environment. The LVC125A has been designed with a ±24mA output driver. This driver is capable of driving a moderate to heavy load while maintaining speed performance. High Output Drivers: ±24mA Reduced system switching noise 5V and 3.3V mixed vol...