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PCD5091 Dataheets PDF



Part Number PCD5091
Manufacturers NXP
Logo NXP
Description DECT baseband controller
Datasheet PCD5091 DatasheetPCD5091 Datasheet (PDF)

INTEGRATED CIRCUITS DATA SHEET PCD5091 DECT baseband controller Objective specification Supersedes data of 1996 Oct 30 File under Integrated Circuits, IC17 1997 Jul 21 Philips Semiconductors Objective specification DECT baseband controller CONTENTS 1 1.1 2 3 4 5 5.1 5.2 6 7 8 8.1 8.2 8.3 8.4 9 10 11 FEATURES DSP software features GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION PACKAGE OUTLINES SOLDERING Introduction Ref.

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INTEGRATED CIRCUITS DATA SHEET PCD5091 DECT baseband controller Objective specification Supersedes data of 1996 Oct 30 File under Integrated Circuits, IC17 1997 Jul 21 Philips Semiconductors Objective specification DECT baseband controller CONTENTS 1 1.1 2 3 4 5 5.1 5.2 6 7 8 8.1 8.2 8.3 8.4 9 10 11 FEATURES DSP software features GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION PACKAGE OUTLINES SOLDERING Introduction Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS PCD5091 1997 Jul 21 2 Philips Semiconductors Objective specification DECT baseband controller 1 FEATURES PCD5091 • Easy interfacing with radio circuits, operating at other supply voltage (RF supply pin with level shifter for RF signals) • On-chip comparator for use as data-slicer • Low power oscillator with integrated frequency adjustment • QFP100 and LQFP100 packages • Power-on-reset • Programmable power-down modes • Low supply voltage (2.7 to 3.6 V) • CMOS technology. 1.1 DSP software features • 80C51 ports P0, P1, P2 and P3 available for interfacing to display, keyboard, I2C-bus, interrupt sources and/or external memory. Integrated 64 kbyte ROM, 3 kbytes of data memory and 1 kbyte SDR-RAM. External program memory is addressable up to 128 kbytes • +2.7 to +5 V port (P0 to P3) interface • TDMA frame (de)multiplexing. Transmission or reception can be programmed for any slot • Ciphering, scrambling, CRC checking/generation and protected B-fields • Speech and data buffering space for six handsets • Local call and B-field loop-back • Two interrupt lines for BML and DSP to interrupt 80C51 • On-chip, three-channel time-multiplexed 8-bit Analog-to-Digital Converter (ADC) for RSSI measurement, one for battery voltage measurement and one channel available for other purposes • On-chip 8-bit Digital-to-Analog Converter (DAC) for electronic potentiometer function • Phase error measurement and phase error correction by hardware • DACs and ADCs for dynamic earpiece and dynamic or electret microphone • On-chip reference voltage • On-chip supply for electret microphone • Very low ohmic buzzer output • Serial interface to external ADPCM CODEC (PCD5032) or 8 kHz u-law samples • Speech switch for Digital Telephone Answering Machine (DTAM) connected to SPI interface • IOM-2 interface (Siemens registered trademark) • Serial interface to synthesizer for frequency programming • Programmable polarity and timing of radio-control signals • GMSK pulse shaper 3 ORDERING INFORMATION TYPE NUMBER PCD5091H PCD5091HZ 1997 Jul 21 • ADPCM encoding and decoding complying with G.721 • Volume control • Speech filters • Programmable gain in speech paths • Side tone and soft mute • Two tone (DTMF) generators • Automatic gain control • Hands-free operation For each DSP software version a separate manual is available in which detailed information is provided on h.


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