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UPA1756 Dataheets PDF



Part Number UPA1756
Manufacturers NEC
Logo NEC
Description N-Channel Power MOSFET
Datasheet UPA1756 DatasheetUPA1756 Datasheet (PDF)

DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1756 SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE DESCRIPTION This product is Dual N-Channel MOS Field Effect Transistor designed for power management application of notebook computers, and Li-ion battery application. PACKAGE DRAWING (Unit : mm) 8 5 1 ; Source 1 2 ; Gate 1 7, 8 ; Drain 1 3 ; Source 2 4 ; Gate 2 5, 6 ; Drain 2 1 4 5.37 Max. +0.10 –0.05 FEATURES • Dual MOS FET chips in small package • 2.5-V gate drive type and low on-resistance .

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DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1756 SWITCHING N-CHANNEL POWER MOS FET INDUSTRIAL USE DESCRIPTION This product is Dual N-Channel MOS Field Effect Transistor designed for power management application of notebook computers, and Li-ion battery application. PACKAGE DRAWING (Unit : mm) 8 5 1 ; Source 1 2 ; Gate 1 7, 8 ; Drain 1 3 ; Source 2 4 ; Gate 2 5, 6 ; Drain 2 1 4 5.37 Max. +0.10 –0.05 FEATURES • Dual MOS FET chips in small package • 2.5-V gate drive type and low on-resistance RDS(on)1 = 30 mΩ MAX. (VGS = 4.5 V, ID = 3.0 A) RDS(on)2 = 40 mΩ MAX. (VGS = 2.5 V, ID = 3.0 A) • Low Ciss Ciss = 800 pF TYP. • Built-in G-S protection diode • Small and surface mount package (Power SOP8) 6.0 ±0.3 4.4 0.8 1.8 Max. 1.44 0.15 0.05 Min. 0.5 ±0.2 0.10 1.27 0.40 0.78 Max. 0.12 M ORDERING INFORMATION PART NUMBER PACKAGE Power SOP8 +0.10 –0.05 µ PA1756G ABSOLUTE MAXIMUM RATINGS (TA = 25 °C) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Drain Current (Pulse)Note1 Total Power Dissipation (1 unit)Note2 Total Power Dissipation (2 unit)Note2 Channel Temperature Storage Temperature VDSS VGSS ID(DC) ID(pulse) PT PT Tch Tstg 20 ±12.0 ±6.0 ±24 1.7 2.0 150 −55 to +150 V V A A W W °C °C Gate Protection Diode Source Gate Drain EQUIVALENT CIRCUIT Body Diode Notes 1. PW ≤ 10 µ s, Duty Cycle ≤ 1 % 2. TA = 25 °C, Mounted on ceramic substrate of 2000 mm2 x 1.1 mm The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. D12909EJ1V0DS00 (1st edition) Date Published February 1999 NS CP (K) Printed in Japan © 1999 µ PA1756 ELECTRICAL CHARACTERISTICS (TA = 25 °C) CHARACTERISTICS Drain to Source On-state Resistance SYMBOL RDS(on)1 RDS(on)2 Gate to Source Cut-off Voltage Forward Transfer Admittance Drain Leakage Current Gate to Source Leakage Current Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage VGS(off) | yfs | IDSS IGSS Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) TEST CONDITIONS VGS = 4.5 V, ID = 3.0 A VGS = 2.5 V, ID = 3.0 A VDS = 10 V, ID = 1.0 mA VDS = 10 V, ID = 3.0 A VDS = 20 V, VGS = 0 V VGS = ±12.0 V, VDS = 0 V VDS = 10 V VGS = 0 V f = 1 MHz ID = 3.0A VGS(on) = 4.0 V VDD = 10 V RG = 10 Ω ID = 6.0 A VDD = 16 V VGS = 4.0 V IF = 6.0 A, VGS = 0 V 800 360 70 110 425 1050 1200 11 2.0 4.6 0.8 0.5 4.0 MIN. TYP. 20.0 25.8 0.7 12 10 ±10 MAX. 30 40 1.5 UNIT mΩ mΩ V S µA µA pF pF pF ns ns ns ns nC nC nC V TEST CIRCUIT 1 SWITCHING TIME D.U.T. RL PG. RG RG = 10 Ω VDD ID 90 % 90 % ID 0 10 % td(on) ton tr td(off) toff 10 % tf VGS TEST CIRCUIT 2 GATE CHARGE D.U.T. IG = 2 mA VGS(on) 90 % VGS Wave Form RL VDD 0 10 % PG. 50 Ω VGS 0 τ τ = 1µ s Duty Cycle ≤ 1 % ID Wave Form 2 Data Sheet D12909EJ1V0DS00 µ PA1756 TYPICAL CHARACTERISTICS (TA = 25 °C) TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1 000 rth(t) - Transient Thermal Resistance - ˚C/W 100 10 1 0.1 0.01 0.001 Mounted on ceramic substrate of 2000mm 2 x 1.1mm Single Pulse , 1 unit 10µ 100 µ 1m 10 m 100 m 1 10 100 1 000 PW - Pulse Width - S RDS(on) - Drain to Source On-State Resistance - mΩ FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT | yfs | - Forward Transfer Admittance - S 100 TA = -50 ˚C -25 ˚C 25 ˚C VDS=10V Pulsed DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 75 Pulsed 10 TA = 75 ˚C 125 ˚C 150 ˚C 50 1 25 ID=3A 0.1 1 10 100 0 2 4 6 8 10 12 14 ID- Drain Current - A RDS(on) - Drain to Source On-State Resistance - mΩ VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 1.0 VDS = 10 V ID = 1 mA 60 Pulsed 40 VGS=2.5V VGS=4V 20 VGS=4.5V VGS(off) - Gate to Source Cut-off Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 0.5 0 1 10 ID - Drain Current - A 100 0 - 50 0 50 100 150 Tch - Channel Temperature -˚C Data Sheet D12909EJ1V0DS00 3 µ PA1756 RDS(on) - Drain to Source On-State Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE ISD - Diode Forward Current - A 40 VGS=2.5V VGS=4V 30 VGS=4.5V 20 100 VGS=4V 10 VGS=2.5V VGS=0V 1 SOURCE TO DRAIN DIODE FORWARD VOLTAGE Pulsed 10 ID= 3A - 50 0 50 100 150 0.1 0 0.5 1.0 1.5 0 Tch - Channel Temperature -˚C CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE VSD - Source to Drain Voltage - V SWITCHING CHARACTERISTICS 10 000 td(on), tr, td(off), tf - Switching Time - ns 1.


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