W180 Datasheet: Peak Reducing EMI Solution





W180 Peak Reducing EMI Solution Datasheet

Part Number W180
Description Peak Reducing EMI Solution
Manufacture Cypress Semiconductor
Total Page 8 Pages
PDF Download Download W180 Datasheet PDF

Features: W180 Peak Reducing EMI Solution Feature s • Cypress PREMIS™ family offering • Generates an EMI optimized clockin g signal at the output • Selectable o utput frequency range • Single 1.25% or 3.75% down or center spread output Integrated loop filter components Operates with a 3.3V or 5V supply • Low power CMOS design • Available in 8-pin SOIC (Small Outline Integrated C ircuit) Table 1. Modulation Width Selec tion SS% 0 1 W180-01, 02, 03 Output Fin ≥ Fout ≥ Fin – 1.25% Fin ≥ Fou t ≥ Fin – 3.75% W180-51, 52, 53 Out put Fin + 0.625% ≥ Fin≥ – 0.625% Fin + 1.875% ≥ Fin≥ –1.875% Tabl e 2. Frequency Range Selection W180 Opt ion# FS2 0 0 1 1 FS1 0 1 0 1 -01, 51 (M Hz) 8 ≤ FIN ≤ 10 10 ≤ FIN ≤ 15 15 ≤ FIN ≤ 18 18 ≤ FIN ≤ 28 -02 , 52 (MHz) 8 ≤ FIN ≤ 10 10 ≤ FIN ≤ 15 N/A N/A -03, 53 (MHz) N/A N/A 15 ≤ FIN ≤ 18 18 ≤ FIN ≤ 28 Key Specifications Supply Voltages: ....... .................................... VDD = 3.3V±5% or VDD = 5V±10% Frequency Range: .............................. 8 MHz ≤ Fin ≤ 28 MHz C.

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W180
Features
Cypress PREMIS™ family offering
• Generates an EMI optimized clocking signal at the
output
• Selectable output frequency range
• Single 1.25% or 3.75% down or center spread output
• Integrated loop filter components
• Operates with a 3.3V or 5V supply
• Low power CMOS design
• Available in 8-pin SOIC (Small Outline Integrated
Circuit)
Key Specifications
Supply Voltages: ........................................... VDD = 3.3V±5%
or VDD = 5V±10%
Frequency Range: .............................. 8 MHz Fin 28 MHz
Cycle to Cycle Jitter: ....................................... 300 ps (max.)
Selectable Spread Percentage: ....................1.25% or 3.75%
Output Duty Cycle: ............................... 40/60% (worst case)
Output Rise and Fall Time: .................................. 5 ns (max.)
Simplified Block Diagram
3.3V or 5.0V
XTAL
Input
X1
X2
W180
Spread Spectrum
Output
(EMI suppressed)
3.3V or 5.0V
Peak Reducing EMI Solution
Table 1. Modulation Width Selection
SS%
0
1
W180-01, 02, 03
Output
Fin Fout Fin
1.25%
Fin Fout Fin
3.75%
W180-51, 52, 53
Output
Fin + 0.625% Fin
0.625%
Fin + 1.875% Fin
–1.875%
Table 2. Frequency Range Selection
W180 Option#
FS2 FS1
-01, 51
(MHz)
-02, 52
(MHz)
-03, 53
(MHz)
0 0 8 FIN 10 8 FIN 10
N/A
0 1 10 FIN 15 10 FIN 15
N/A
1 0 15 FIN 18 N/A 15 FIN 18
1 1 18 FIN 28 N/A 18 FIN 28
Pin Configurations
SOIC
CLKIN or X1
NC or X2
GND
SS%
1
2
3
4
8 FS2
7 FS1
6 VDD
5 CLKOUT
CLKIN or X1
NC or X2
GND
SS%
1
2
3
4
8 SSON#
7 FS1
6 VDD
5 CLKOUT
Oscillator or
Reference Input
W180
Spread Spectrum
Output
(EMI suppressed)
PREMIS is a trademark of Cypress Semiconductor Corporation.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
July 21, 2000, rev. *A

                    
  






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