W194

W194 Frequency Multiplier and Zero Delay Buffer Features Two outputs Configuration options allow various multiplications of the reference frequency—refer to Table 1 to determine the specific option which meets your multiplication needs Available in 8-pin SOIC package Table 1. Configuration Options FBIN OUT1 OUT1 OUT1 OUT1 OUT2 Operating Voltage: .............................. 3.3V±5% or 5.0±10% Operating Range: .......................10 MHz < fOUT1 < 133 MHz Absolute Jitter: ......................................................... ±500 ps Output to Output Skew: .............................................. 250 ps Propagation Delay: ................................................... ±350 ps Propagation delay is affected by input rise time. OUT2 OUT2 OUT2 FS0 0 1 0 1 0 1 0 1 FS1 0 0 1 1 0 0 1 1 OUT1 2 X REF 4 X REF REF 8 X REF 4 X REF 8 X REF 2 X REF 16 X REF OUT2 REF 2 X REF REF/2 4 X REF 2 X REF 4 X REF REF 8 X REF Key Specifications Block Diagram FBIN External feedback connection to OUT1 or OUT2, not both Pin Configuration SOIC FBIN IN GND 1 2 3 4 8 7 6 5 OUT2 VDD OUT1 FS1 FS0 FS1 ÷Q FS0 IN Reference Input Phase Detector Charge Pump Loop Filter Output Buffer VCO ÷2 Output Buffer OUT1 OUT2 Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134 408-943-2600 January 5, 2000, rev. *A W194 Pin Definitions Pin Name IN FBIN Pin No. 2 1 Pin Type I I Pin Description Reference Input: The output signals will be synchronized to ...