W195B

PRELIMINARY W195B Frequency Generator for Integrated Core Logic Features Maximized EMI suppression using Cypress’s Spread Spectrum Technology Low jitter and tightly controlled clock skew Highly integrated device providing clocks required for CPU, core logic, and SDRAM Two copies of CPU clocks Nine copies of SDRAM clocks Eight copies of PCI clock One copy of synchronous APIC clock Two copies of 66-MHz outputs Two copies of 48-MHz outputs One copy of selectable 24- or 48-MHz clock One copy of double strength 14.31818-MHz reference clock Power-down control I2C interface for turning off unused clocks SDRAM, APIC, 48MHz Output Skew: ........................ 250 ps PCI Output Skew: ........................................................500 ps CPU to SDRAM Skew (@100 MHz): ..................4.5 to 5.5 ns CPU to 3V66 Skew (@ 66 MHz): ....................... 7.0 to 8.0 ns 3V66 to PCI Skew (3V66 lead):.......................... 1.5 to 3.5 ns PCI to APIC Skew: ....................................................± 0.5 ns Table 1. Frequency Selections FS3 FS2 FS1 FS0 CPU SDRAM 3V66 1 1 1 1 133.6 133.6 66.8 1 1 1 0 Reserved 1 1 0 1 100.2 100.2 66.8 1 1 0 0 66.8 100.2 66.8 1 0 1 1 105 105 70 1 0 1 0 110 110 73.3 1 0 0 1 114 114 76 1 0 0 0 119 119 79.3 0 1 1 1 124 124 82.7 0 1 1 0 129 129 64.5 0 1 0 1 95 95 63.3 0 1 0 0 138 138 69 0 0 1 1 150 150 75 0 0 1 0 75 113 75 0 0 0 1 90 90 60 0 0 0 0 83.3 125 83.3 PCI APIC 33.4 16.7 33.4 33.4 35 36.7 38 39.7 41.3 32.3 31....