W232

W232 Ten Output Zero Delay Buffer Features Well suited to both 100- and 133-MHz designs Ten/Eleven LVCMOS/LVTTL outputs 3.3V power supply Available in 24-pin TSSOP package Key Specifications Operating Voltage: ................................................ 3.3V±10% Operating Range: ........................25 MHz < fOUT < 140 MHz Cycle-to-Cycle Jitter: ................................................<150 ps Output to Output Skew: ............................................<100 ps Phase Error Jitter: .....................................................<125 ps Static Phase Error: ....................................................<150 ps Block Diagram Pin Configurations )%,1 &/. 3// )%287 4 4 4 AGND VDD Q0 Q1 Q2 GND GND Q3 Q4 VDD OE0:4 FBOUT 1 2 3 4 5 6 7 8 9 10 11 12 : 24 23 22 21 20 19 18 17 16 15 14 13 CLK AVDD VDD Q8 Q7 GND GND Q6 Q5 VDD OE5:8 FBIN 2( 4 2( 4 4 2( 4 4 4 4 &RQILJXUDWLRQ RI WKHVH EORFNV GHSHQGHQW XSRQ VSHFLILF RSWLRQ EHLQJ XVHG $*1' 9'' 4 4 4 *1' *1' 4 4 9'' 2( )%287             :             &/. $9'' 9'' 4 4 *1' *1' 4 4 4 9'' )%,1 Spread Aware is a trademark of Cypress Semiconductor Corporation. Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134 408-943-2600 August 8, 2000, rev. *C W232 Pin Definitions Pin Name CLK FBIN Pin No. (-09) 24 13 Pin No. (-10) 24 13 Pin Type I I Pin Description Reference Input: Output si...