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X1243
Real Time Clock/Calendar/Alarm with EEPROM
DESCRIPTION
2-Wire™ RTC
FEATURES • 2 Alarms—Interrupt Output —Settable on the Second, 10s of Seconds, Minute, 10s of Minutes, Hour, Day, Month, or Day of the Week —Repeat alarm for time base generation • 2 Wire Interface interoperable with I2C. —400kHz data transfer rate • Secondary Power Supply Input with internal switch-over circuitry. • Year 2000 Compliant • 2K bytes of EEPROM —64 Byte Page Write Mode —3 bit Block Lock • Low Power CMOS —<1µA Operating Current —<3mA Active Current during Program —<400µA Active Current during Data Read • Single Byte Write Capability • Typical Nonvolatile Write Cycle Time: 5ms • High Reliability —100,000 Endurance Cycles —Guaranteed Data Retention: 100 Years • Small Package Options —8-Lead SOIC Package, 8L TSSOP Package
The X1243 is a Real Time Clock with clock/calendar circuits and two alarms. The dual port clock and alarm registers allow the clock to operate, without loss of accuracy, even during read and write operations. The clock/calendar provides functionality that is controllable and readable through a set of registers. The clock, using a low cost 32.768kHz crystal input, accurately tracks the time in seconds, minutes, hours, date, day, month and years. It has leap year correction, automatic adjustment for the year 2000 and months with less than 31 days. An alarm match of the RTC sets an interrupt flag and activates an interrupt pin. An alternative alarm function provides a pulsed interrupt for long time constant timebases. The device offers a backup power input pin. This Vback pin allows the device to be backed up by a nonrechargeable battery. The RTC is fully operational from 1.8 to 5.5 volts. The X1243 provides a 2K byte EEPROM array, giving a safe, secure memory for critical user and configuration data. This memory is unaffected by complete failure of the main and backup supplies.
BLOCK DIAGRAM
32.768kHz X1 Oscillator X2 Frequency Divider 1Hz Timer Calendar Logic Time Keeping Registers (SRAM)
Mask
SCL SDA
Serial Interface Decoder
Control Decode Logic
Control Registers (EEPROM)
Status Register (SRAM)
Alarm
Compare Alarm Regs (EEPROM) 16K EEPROM Array
8
Interrupt Enable IRQ Alarm
©Xicor, Inc. 1994, 1995, 1996 Patents Pending 9900-3003.1 4/1/99
1
Characteristics subject to change without notice
X1243
or Epson C-002RX. The crystal supplies a timebase for a clock/oscillator. The internal clock can be driven by an external signal on X1, with X2 left unconnected.
VCC VBack SCL SDA
18pF X1 X2
X1243
8 pin SOIC X1 X2 IRQ VSS 1 2 3 4 8 7 6 5
10M 220K 43pF
X1243 8 pin TSSOP VBack VCC X1 X2 1 2 3 4 8 7 6 5
SCL SDA VSS
IRQ
Figure 1. Recommended Crystal connection POWER CONTROL OPERATION The Power control circuit accepts a VCC and a VBACK input. The power control circuit will switch to VBACK when VCC < VBACK - 0.2V. It will switch back to VCC when VCC exceeds VBACK.
VCC VBACK
VCC = VBACK -0.2V
PIN DESCRIPTIONS Serial Clock (SCL) The SCL inp.