74HCT356

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT356 8-input multiplexer/register; 3-state Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification 8-input multiplexer/register; 3-state FEATURES Non-transparent data latches Transparent address latch Easily expanding Complementary outputs Output capability: bus driver ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT356 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL 74HC/HCT356 (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT356 data selectors/multiplexers contain full on-chip binary decoding, to select one-of-eight data sources. The data select address is stored in transparent latches that are enabled by a LOW on the latch enable input LE. Data on the 8 input lines (D0 to D7) is clocked into a edge-triggered data register by a LOW-to-HIGH transition of the clock (CP). When the output enable input OE1 = HIGH, OE2 = HIGH or OE3 = LOW, the outputs go to the high impedance OFF-state. Operation of these output enable inputs does not affect the state of the latches and register. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propa...