74HCT533

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT533 Octal D-type transparent latch; 3-state; inverting Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Octal D-type transparent latch; 3-state; inverting FEATURES 3-state inverting outputs for bus oriented applications Common 3-state output enable input Output capability: bus driver ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT533 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT533 are octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. A latch enable (LE) input and an output enable (OE) input are common to all latches. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT533 The “533” consists of eight D-type transparent latches with 3-state inverting outputs. When LE is HIGH, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the D-inputs ...