74HCT646

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT646 Octal bus transceiver/register; 3-state Product specification File under Integrated Circuits, IC06 September 1993 Philips Semiconductors Product specification Octal bus transceiver/register; 3-state FEATURES Independent register for A and B buses Multiplexed real-time and stored data Output capability: bus driver ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT646 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT646 consist of bus transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the internal registers. Data on the “A” or “B” bus will be QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns 74HC/HCT646 clocked into the registers as the appropriate clock (CPAB and CPBA) goes to a HIGH logic level. Output enable (OE) and direction (DIR) inputs are provided to control the transceiver function. In the transceiver mode, data present at the high-impedance port may be stored in either the “A” or “B” register, or in both. The select source inputs (SAB and SBA) can multiplex stored and real-time (tr...