74LCX125

74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs March 1995 Revised April 1999 74LCX125 Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs General Description The LCX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX125 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. s 6.0 ns tPD max (VCC = 3.3V), 10 µA ICC max s Power down high impedance inputs and outputs s Supports live insertion/withdrawal (Note 1) s ±24 mA output drive (VCC = 3.0V) s Implements patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 100V Note 1: To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. Features s 5V tolerant inputs and outputs s 2.3V–3.6V VCC specifications provided Ordering Code: Order Number 74LCX125M 74LCX125SJ 74LCX125MTC Package Number M14A M14D MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Sp...