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74LCX245 Dataheets PDF



Part Number 74LCX245
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Low Voltage Bidirectional Transceiver
Datasheet 74LCX245 Datasheet74LCX245 Datasheet (PDF)

74LCX245 — Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs December 2013 74LCX245 Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs Features ■ 5V tolerant inputs and outputs ■ 2.3V to 3.6V VCC specifications provided ■ 7.0ns tPD max. (VCC = 3.3V), 10µA ICC max. ■ Power down high impedance inputs and outputs ■ Supports live insertion/withdrawal(1) ■ ±24mA output drive (VCC = 3.0V) ■ Implements proprietary noise/EMI reduction circuitry ■ Latch-u.

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74LCX245 — Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs December 2013 74LCX245 Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs Features ■ 5V tolerant inputs and outputs ■ 2.3V to 3.6V VCC specifications provided ■ 7.0ns tPD max. (VCC = 3.3V), 10µA ICC max. ■ Power down high impedance inputs and outputs ■ Supports live insertion/withdrawal(1) ■ ±24mA output drive (VCC = 3.0V) ■ Implements proprietary noise/EMI reduction circuitry ■ Latch-up performance exceeds 500mA ■ ESD performance: – Human body model > 2000V – Machine model > 200V ■ Leadless DQFN package Note: 1. To ensure the high-impedance state during power up or down, OE should be tied to VCC through a pull-up resistor: the minimum value or the resistor is determined by the current-sourcing capability of the driver. General Description The LCX245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The device is designed for low voltage (2.5V and 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The T/R input determines the direction of data flow through the device. The OE input disables both the A and B ports by placing them in a high impedance state. The LCX245 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. Ordering Information Order Number Package Number Package Description 74LCX245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74LCX245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX245BQX(2) MLP20B 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 4.5mm 74LCX245MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74LCX245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Note: 2. DQFN package available in Tape and Reel only. Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1994 Fairchild Semiconductor Corporation 74LCX245 Rev. 1.11.1 www.fairchildsemi.com 74LCX245 — Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs Connection Diagrams Pin Assignments for SOIC, SOP, SSOP, and TSSOP Logic Symbol Pin Assignment for DQFN Truth Table Inputs OE T/R Outputs L L Bus B0 – B7 Data to Bus A0 – A7 L H Bus A0 – A7 Data to Bus B0 – B7 H X HIGH Z State on A0 – A7, B0 – B7(3) H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Note: 3. Unused bus terminals during HIGH Z State must be held HIGH or LOW. Logic Diagram (Top Through View) (Bottom View) Pin Description Pin Names Description OE Output Enable Input T/R Transmit/Receive Input A0–A7 B0–B7 DAP Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs No Connect Note: DAP (Die Attach Pad) ©1994 Fairchild Semiconductor Corporation 74LCX245 Rev. 1.11.1 2 www.fairchildsemi.com 74LCX245 — Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter VCC Supply Voltage VI DC Input Voltage VO DC Output Voltage Output in 3-STATE Output in HIGH or LOW State(4) IIK IOK IO ICC IGND TSTG DC Input Diode Current, VI < GND DC Output Diode Current VO < GND VO > VCC DC Output Source/Sink Current DC Supply Current per Supply Pin DC Ground Current per Ground Pin Storage Temperature Note: 4. IO Absolute Maximum Rating must be observed. Rating –0.5V to +7.0V –0.5V to +7.0V –0.5V to +7.0V –0.5V to VCC + 0.5V –50mA –50mA +50mA ±50mA ±100mA ±100mA –65°C to +150°C Recommended Operating Conditions(5) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter VCC Supply Voltage Operating Data Retention VI Input Voltage VO Output Voltage 3-STATE HIGH or LOW State IOH / IOL TA ∆t / ∆V Output Current VCC = 3.0V–3.6V VCC = 2.7V–3.0V VCC = 2.3V–2.7V Free-Air Operating Temperature Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V Note: 5. Unused inputs must be held HIGH or LOW. They may not float. Min. 2.0 1.5 0 0 0 –40 0 Max. 3.6 3.6 5.5 5.5 VCC ±24 ±12 ±8 85 10 Units V V V mA °C ns /V ©1994 Fairchild Semiconductor Corporation 74LCX245 Rev. 1..


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