Document
74LCX374
OCTAL D-TYPE FLIP FLOP NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
s 5V TOLERANT INPUTS AND OUTPUTS
s HIGH SPEED: fMAX = 150 MHz (MIN.) at VCC = 3V
s POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V
s PCI BUS LEVELS GUARANTEED AT 24 mA
SOP
TSSOP
s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE: VCC(OPR) = 2.0V to 3.6V (1.5V Data Retention)
s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 374
Table 1: Order Codes
PACKAGE SOP
TSSOP
T&R
74LCX374MTR 74LCX374TTR
s LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17)
s ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V
DESCRIPTION The 74LCX374 is a low voltage CMOS OCTAL D-TYPE FLIP FLOP with 3 STATE OUTPUT NON-INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. These 8 bit D-Type flip-flops are controlled by a clock input (CK) and an output enable input (OE). On the positive transition of the clock, the Q
outputs will be set to the logic state that were setup at the D inputs. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. The Output control does not affect the internal operation of flip flops; that is, the old data can be retained or the new data can be entered even while the outputs are off. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
Figure 1: Pin Connection And IEC Logic Symbols
September 2004
Rev. 4
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74LCX374
Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description
PIN N° 1
2, 5, 6, 9, 12, 15, 16, 19
3, 4, 7, 8, 13, 14, 17, 18 11
10 20
SYMBOL OE
Q0 to Q7
NAME AND FUNCTION
3 State Output Enable Input (Active LOW) 3-State Outputs
D0 to D7 Data Inputs
CK
GND VCC
Clock Input (LOW to HIGH, edge triggered)
Ground (0V)
Positive Supply Voltage
Figure 3: Logic Diagram
Table 3: Truth Table
INPUT OE CK HX L L L
D X X L H
X : Don’t Care Z : High Impedance
OUTPUT
Q Z NO CHANGE L H
This logic diagram has not be used to estimate propagation delays
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Table 4: Absolute Maximum Ratings
Symbol
VCC VI VO VO IIK IOK IO ICC IGND Tstg TL
Parameter Supply Voltage DC Input Voltage DC Output Voltage (OFF State) DC Output Voltage (High or Low State) (note 1) DC Input Diode Current DC Output Diode Current (note 2) DC Output Current DC Supply Current per Supply Pin DC Ground Current per Supply Pin Storage Temperature Lead Temperature (10 sec)
Value
-0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5
- 50 - 50 ± 50 ± 100 ± 100 -65 to +150 300
Unit
V V V V mA mA mA mA mA °C °C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND
Table 5: Recommended Operating Conditions
Symbol
VCC VI VO VO IOH, IOL IOH, IOL Top dt/dv
Parameter Supply Voltage (note 1) Input Voltage Output Voltage (OFF State) Output Voltage (High or Low State) High or Low Level Output Current (VCC = 3.0 to 3.6V) High or Low Level Output Current (VCC = 2.7V) Operating Temperature Input Rise and Fall Time (note 2)
1) Truth Table guaranteed: 1.5V to 3.6V 2) VIN from 0.8V to 2V at VCC = 3.0V
Value
2.0 to 3.6 0 to 5.5 0 to 5.5 0 to VCC
± 24 ± 12 -55 to 125 0 to 10
Unit
V V V V mA mA °C ns/V
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Table 6: DC Specifications
Test Condition
Value
Symbol
Parameter
VIH High Level Input Voltage
VIL Low Level Input Voltage
VOH High Level Output Voltage
VOL Low Level Output Voltage
II Ioff IOZ
ICC ∆ICC
Input Leakage Current Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current
ICC incr. per Input
VCC -40 to 85 °C (V) Min. Max.
2.7 to 3.6
2.7 to 3.6 2.7 3.0
2.7 to 3.6 2.7 3.0
2.7 to 3.6
IO=-100 µA IO=-12 mA IO=-18 mA IO=-24 mA IO=100 µA IO=12 mA IO=16 mA IO=24 mA
VI = 0 to 5.5V
2.0
VCC-0.2 2.2 2.4 2.2
0.8
0.2 0.4 0.4 0.55 ±5
0 VI or VO = 5.5V
10
2.7 to 3.6
VI = VIH or VIL VO = 0 to VCC
2.7 to 3.6 VI = VCC or GND VI or VO= 3.6 to 5.5V
2.7 to 3.6 VIH = VCC - 0.6V
±5
10 ± 10 500
-55 to 125 °C Min. Max. 2.0
VCC-0.2 2.2 2.4 2.2
0.8
0.2 0.4 0.4 0.55 ±5
10
±5
10 ± 10 500
Table 7: Dynamic Switching Characteristics
Unit
V V
V
V
µA µA µA µA µA
Test Condition
Value
Symbol
Parameter
VOLP VOLV
Dynamic Low Level Quiet Output (note 1)
VCC
TA = 25 °C
Unit
(V) Min. Typ. Max.
3.3
CL = 50pF VIL = 0V, VIH = 3.3V
0.8 -0.8
V
1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remainin.