74LCX74

74LCX74 — Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs December 2013 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Features ■ 5V tolerant inputs ■ 2.3V–3.6V VCC specifications provided ■ 7.0ns tPD max. (VCC = 3.3V), 10µA ICC max. ■ Power down high impedance inputs and outputs ■ ±24mA output drive (VCC = 3.0V) ■ Implements proprietary noise/EMI reduction circuitry ■ Latch-up performance exceeds JEDEC 78 conditions ■ ESD performance: – Human body model > 2000V – Machine model > 200V ■ Leadless Pb-Free DQFN package General Description The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. After the Clock Pulse input threshold voltage has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input. Asynchronous Inputs: ■ LOW input to SD (Set) sets Q to HIGH level ■ LOW input to CD (Clear) sets Q to LOW level ■ Clear and Set are independent of clock ■ Simultaneous LOW on CD and SD makes both Q and Q HIGH Ordering Information Order Number Package Number Package Description 74LCX74M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LCX74SJ 74LCX74BQX(1) M14D MLP14A 14-Lead Small Outline Package (SOP), EIAJ TYPE I...