74LS175

SN74LS175 Quad D Flip-Flop The LSTTL / MSI SN74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH clock transition. Both true and complemented outputs of each flip-flop are provided. A Master Reset input resets all flip-flops, independent of the Clock or D inputs, when LOW. The LS175 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families. http://onsemi.com LOW POWER SCHOTTKY Edge-Triggered D-Type Inputs Buffered-Positive Edge-Triggered Clock Clock to Output Delays of 30 ns Asynchronous Common Reset True and Complement Output Input Clamp Diodes Limit High Speed Termination Effects 16 1 GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Parameter Supply Voltage Operating Ambient Temperature Range Output Current – High Output Current – Low Min 4.75 0 Typ 5.0 25 Max 5.25 70 – 0.4 8.0 Unit V °C mA mA PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B ORDERING INFORMATION Device SN74LS175N SN74LS175D Package 16 Pin DIP 16 Pin Shipping 2000 Units/Box 2500/Tape & Reel © Semiconductor Components Industries, LLC, 1999 1 December, 1999 – Rev. 6 Publication Order Number: SN74LS175/D SN74LS175 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 Q3 15 Q3 14 D3 13 D2 12 Q2 11 Q2 10 CP 9 NOTE: The Flatpak version has the same pinouts (Connection...