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74LS241

National Semiconductor

Octal TRI-STATE Buffers/Line Drivers/Line Receivers

DM54LS240 DM74LS240 DM54LS241 DM74LS241 Octal TRI-STATE Buffers Line Drivers Line Receivers April 1992 DM54LS240 DM74L...


National Semiconductor

74LS241

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DM54LS240 DM74LS240 DM54LS241 DM74LS241 Octal TRI-STATE Buffers Line Drivers Line Receivers April 1992 DM54LS240 DM74LS240 DM54LS241 DM74LS241 Octal TRI-STATE Buffers Line Drivers Line Receivers General Description These buffers line drivers are designed to improve both the performance and PC board density of TRI-STATE buffers drivers employed as memory-address drivers clock drivers and bus-oriented transmitters receivers Featuring 400 mV of hysteresis at each low current PNP data line input they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133X Y Y Y Features Y Y Y Y Y TRI-STATE outputs drive bus lines directly PNP inputs reduce DC loading on bus lines Hysteresis at data inputs improves noise margins Typical IOL (sink current) 54LS 12 mA 74LS 24 mA Typical IOH (source current) b 12 mA 54LS b 15 mA 74LS Typical propagation delay times Inverting 10 5 ns Noninverting 12 ns Typical enable disable time 18 ns Typical power dissipation (enabled) Inverting 130 mW Noninverting 135 mW Connection Diagrams Dual-In-Line Package Dual-In-Line Package TL F 6411 – 1 TL F 6411 – 2 Order Number DM54LS240J DM54LS240W DM54LS240E DM74LS240WM or DM74LS240N See NS Package Number E20A J20A M20B N20A or W20A Order Number DM54LS241J DM54LS241W DM54LS241E DM74LS241WM or DM74LS241N See NS Package Number E20A J20A M20B N20A or W20A Function Tables LS240 Inputs G L L H A L H X Output Y H L Z G X X X H H L G L L H X X X LS241 Input...




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