74LS298

DM74LS298 Quad 2-Port Register Multiplexer with Storage October 1988 Revised March 2000 DM74LS298 Quad 2-Port Register Multiplexer with Storage General Description The DM74LS298 is a quad 2-port register. It is the logical equivalent of a quad 2-input multiplexer followed by a quad 4-bit edge-triggered register. A Common Select input selects between two 4-bit input ports (data sources). The selected data is transferred to the output register synchronous with the HIGH-to-LOW transition of the Clock input. Features s Select from two data sources s Fully edge-triggered operation s Typical power dissipation of 65 mW Ordering Code: Order Number DM74LS298N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Logic Symbol Connection Diagram VCC = Pin 16 GND = Pin 8 Pin Descriptions Pin Names S CP I0a, I0d I1a, I1d Qa, Qd Description Common Select Inputs Clock Pulse Input (Active Falling Edge) Source 0 Data Inputs Source 1 Data Inputs Flip-Flip Outputs Truth Table Inputs S l l h h I0x l h X X I1x X X l h Output Qx L H L H l = LOW Voltage Level one setup time prior to the HIGH-to-LOW clock transition. h = HIGH Voltage Level one setup time prior to the HIGH-to-LOW clock transition. H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © 2000 Fairchild Semiconductor Corporation DS009826 www.fairchildsemi.com DM74LS298 Functional Description This device is a high speed quad 2-port register. It selects four bits...