74LVC161

INTEGRATED CIRCUITS 74LVC161 Presettable synchronous 4-bit binary counter; asynchronous reset Product specification Supersedes data of 1996 Aug 23 IC24 Data Handbook 1998 May 20 Philips Semiconductors Philips Semiconductors Product specification Presettable synchronous 4-bit binary counter; asynchronous reset 74LVC161 FEATURES Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8–1A Inputs accept voltages up to 5.5 V CMOS low power consumption Direct interface with TTL levels Asynchronous reset Synchronous counting and loading Two count enable inputs for n–bit cascading Positive edge–triggered clock Output drive capability 50 W transmission lines @85_C DESCRIPTION The 74LVC161 is a high–performance, low–power, low–voltage, Si–gate CMOS device and superior to most advanced CMOS compatible TTL families. The 74LVC161 is a synchronous presettable binary counter which features an internal look–head carry and can be used for high–speed counting. Synchronous operation is provided by having all flip–flops clocked simultaneously on the positive–going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive–going edge of the clock (provided that the set–up and hold time requirements for PE are met). Preset takes plac...