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TDA7326 Dataheets PDF



Part Number TDA7326
Manufacturers ST Microelectronics
Logo ST Microelectronics
Description AM-FM RADIO FREQUENCY SYNTHESIZER
Datasheet TDA7326 DatasheetTDA7326 Datasheet (PDF)

TDA7326 AM-FM RADIO FREQUENCY SYNTHESIZER FM INPUT AND PRECOUNTER FOR UP TO 140MHz AM INPUT FOR UP TO 40MHz 6-BIT SWALLOW COUNTER, 8-BIT PROGRAMMABLE COUNTER FOR FM AND SW 14-BIT PROGRAMMABLE COUNTER FOR LW AND MW THREE WIRES 8-BIT SERIAL INTERFACE ON-CHIP REFERENCE OSCILLATOR AND COUNTER PROGRAMMABLE SCANNING STEPS FOR AM AND FM DIGITAL PHASE DETECTOR AND LOOP FILTER TWO SEPARATE FREE PROGRAMMABLE FILTER APPLICATIONS AVAILABLE TUNING VOLTAGE OUTPUT 0.5 TO 9.5V PROGRAMMABLE CURRENT SOURCES TO SE.

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TDA7326 AM-FM RADIO FREQUENCY SYNTHESIZER FM INPUT AND PRECOUNTER FOR UP TO 140MHz AM INPUT FOR UP TO 40MHz 6-BIT SWALLOW COUNTER, 8-BIT PROGRAMMABLE COUNTER FOR FM AND SW 14-BIT PROGRAMMABLE COUNTER FOR LW AND MW THREE WIRES 8-BIT SERIAL INTERFACE ON-CHIP REFERENCE OSCILLATOR AND COUNTER PROGRAMMABLE SCANNING STEPS FOR AM AND FM DIGITAL PHASE DETECTOR AND LOOP FILTER TWO SEPARATE FREE PROGRAMMABLE FILTER APPLICATIONS AVAILABLE TUNING VOLTAGE OUTPUT 0.5 TO 9.5V PROGRAMMABLE CURRENT SOURCES TO SET THE LOOP GAIN ON-CHIP POWER ON RESET STANDBY MODE BLOCK DIAGRAM DIP16 SO16W ORDERING NUMBERS: TDA7326 (DIP16) TDA7326D (SO16W) DESCRIPTION The TDA7326 is a PLL frequency synthesizer in CMOS technology that performs all the function of a PLL radio tuning system for FM and AM (LW, MW, SW) July 1994 1/16 TDA7326 ABSOLUTE MAXIMUM RATINGS Symbol VDD1 - VSS VDD2 - VSS VIN VOUT IIN IOUT Tstg TA Supply Voltage Supply Voltage Input Voltage Output Voltage Input Current Output Current Storage Temperature Ambient Temperature Parameter Value - 0.3 to + 7 - 0.3 to + 12 VSS - 0.3 to VDD + 0.3 VSS - 0.3 to VDD + 0.3 - 10 to + 10 - 10 to + 10 - 55 to + 125 -40 to + 85 Unit V V V V mA mA o o C C PIN CONNECTION THERMAL DATA Symbol Rth j-amb Parameter Thermal Resistance Junction-ambient DIP 16 100 SO 16L 200 Unit °C/W Figure 1:Input Sensitivity 2/16 TDA7326 ELECTRICAL CHARACTERISTICS (Tamb = 25°C ; VDD1 = 5V; VDD2 = 9V fOSC = 4MHz; RISET = 68KΩ; unless otherwise specified.) Symbol VDD1 VDD2 IDD1 FM IDD1 AM IDD1 STB IDD2 VREF ViSET Parameter Supply Voltage Supply Voltage Supply Current Supply Current Supply Current Supply Current Voltage at pin 3 Voltage at pin 2 RiSET = 68KΩ no output load, FM mode, fin = 100MHz no output load, AM mode, fin = 1MHz Standby mode 0.5 3.0 7.0 10 3 Test Condition Min. 4.5 Typ. 5.0 9.0 18 5 3 2 3.5 8.0 Max. 5.5 10.0 25 10 20 3 4.0 9.0 Unit V V mA mA µA mA V V RF INPUT (AMIN FMIN) fiAM fiFM ViAM Input Frequency AM Input Frequency FM Input Voltage AM Direct Mode, Vin = 50mV Swallow Mode, Vin = 50mV Sinus, Vin = 50mV Direct Mode 0.6 to 16MHz (Sinus) Swallow Mode 16 to 40MHz (Sinus) ViFM Zin Zin Input Voltage FM Input Impedance FM Input Impedance AM 70 to 120MHz (Sinus) fin = 120MHz fin = 12MHz 0.5 16 30 40 40 30 200 1400 20 40 140 600 600 600 MHz MHz MHz mVrms mVrms mVrms Ω Ω OSCILLATOR fOSC tbu C in C OUT Zin Vin Oscillator Frequency Built Up Time Internal Capacitance Internal Capacitance Input Impedance Input Voltage 0.5 Euro-Quartz ITT 9 9 4 15 VDD1 4 100 MHz ms pF pF KΩ Vpp PLL CHARACTERISTICS fstep fstep fref fref Step Width AM Step Width FM Ref Frequency AM Ref Frequency FM 1/2.5 12.5/25 1/2.5 12.5/25 KHz KHz KHz KHz LOOP FILTER INPUT (LPIN1, LPIN2 = PIN 15,16) -Iin Iin Input Leakage Current Input Leakage Current VIN = VSS; Phase Detector Output = Tristate VIN = VDD; Phase Detector Output = Tristate -1 -0.1 0.1 +1 µA µA 3/16 TDA7326 ELECTRICAL CHARACTERISTICS (continued) LOOP FILTER OUTPUT (LPOUT = PIN 14) Symbol vOL VOH Parameter Output Voltage Low Output Voltage High Test Condition ILOAD = 0.2mA VDD2; = 10V -ILOAD = 0.2mA VDD2; = 10V 9 Min. Typ. 0.5 9.5 Max. 0.8 Unit V V CHARGE PUMP CURRENT GENERATION (LPIN1, LPIN2 = PIN 15, 16) Isi Sink Current LPIN1,2 CURR1 = 0, CURR2 = 0 CURR1 = 0, CURR2 = 1 CURR1 = 1, CURR2 = 1 CURR1 = 1, CURR2 = 0 -Iso Source Current LPIN1,2 CURR1 = 0, CURR2 = 0 CURR1 = 0, CURR2 = 1 CURR1 = 1, CURR2 = 1 CURR1 = 1, CURR2 = 0 2 120 180 370 2 120 180 370 5 200 300 500 5 200 300 500 7 280 420 630 7 280 420 630 µA µA µA µA µA µA µA µA DOUT1 OPENDRAIN OUTPUT(PIN 9) vOL Output Voltage Low ILOAD = 1mA 0.2 0.5 V BUS INTERFACE -IIL IIH vIH VIL Input Leakage Current Input Leakage Current Input Voltage High Input Voltage Low VIN = VSS VIN = VSS Leading edge Leading edge -1 -1 3.4 0.1 0.1 4.0 1.0 1.6 1 1 µA µA V V BUS INTERFACE, WAITING TIME (see fig. 5) The Data is Acquired at the High → Low Clock Transition t1 t3 t5 CLK Low to DLEN L → H DATA Transition to CLK H → L CLK H → L to DATA Transition 0.2 0.1 0.4 µs µs µs BUS INTERFACE, DATA REPETITION TIME (see fig. 5) tr1 tr2 Release Time Between 2 bytes, except byte 4 Release Time after the transmission of byte 4 FM mode AM mode 5 180 2 µs µs ms BUS INTERFACE, SETUP TIME (see fig. 5) t2 DLEN High to CLK L → H 0.1 µs BUS INTERFACE, HOLD TIME (see fig. 5) t4 t6 fCLK tpl tph DATA Transition to CKL L → H CLK H → L to DLEN H → L CLK Frequency Duty Cycle Clock Pulse Low Clock Pulse High 1 1 50 0 0.4 500 µs µs KHz % µs µs 4/16 TDA7326 2.0 GENERAL DESCRIPTION This circuit contains a frequency synthesizer and a loop filter for an FM and AM radio tuning system. Only a VCO is required to build a complete PLL system. For FM and SW application, the counter works in a two stages configuration. The first stage is a swallow counter with a four modulus (:32/33/64/65) precounter. The second stage is an 8-bit programmable counter. For LW and MW application, a 14-bit programmable counter is available. The circuit receives the scaling fac.


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