HYB5117400BT-50

4M x 4-Bit Dynamic RAM HYB5117400BJ -50/-60/-70 HYB5117400BT -50/-60/-70 Advanced Information 4 194 304 words by 4-bit organization 0 to 70 °C operating temperature Performance: -50 tRAC tCAC tAA tRC tPC RAS access time CAS access time Access time from address Read/Write cycle time Fast page mode cycle time 50 13 25 90 35 -60 60 15 30 110 40 -70 70 20 35 130 45 ns ns ns ns ns Single + 5 V (± 10 %) supply Low power dissipation max. 660 active mW (-50 version) max. 605 active mW (-60 version) max. 550 active mW (-70 version) 11 mW standby (TTL) 5.5. mW standby (MOS) Output unlatched at cycle end allows two-dimensional chip selection Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh, self refresh and test mode Fast page mode capability All inputs, outputs and clocks fully TTL-compatible 2048 refresh cycles / 32 ms Plastic Package: P-SOJ-26/24 300 mil P TSOPII-26/24 300 mil Semiconductor Group 1 1.96 HYB 5117400BJ/BT-50/-60/-70 4M x 4-DRAM The HYB 5117400BJ/BT is a 16MBit dynamic RAM organized as 4194304 words by 4-bits. The HYB 5117400BJ/BT utilizes a submicron CMOS silicon gate process technology, as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 5117400BJ/BT to be packaged in a standard SOJ 26/24 or TSOPII-26/24 plastic package, both with 300 mil width. These packages provide high system bit densitie...