HYB5117800BSJ-60

2M × 8 - Bit Dynamic RAM 2k Refresh (Fast Page Mode) Advanced Information 2 097 152 words by 8-bit organization 0 to 70 °C operating temperature Fast Page Mode operation Performance: -50 -60 60 15 30 104 40 ns ns ns ns ns HYB 5117800/BSJ-50/-60 HYB 3117800BSJ-50/-60 tRAC tCAC tAA tRC tPC RAS access time CAS access time Access time from address Read/Write cycle time Fast page mode cycle time 50 13 25 84 35 Power dissipation: HYB5117800 -50 Power Supply Active TTL Standby CMOS Standby 440 -60 5 ± 10% 385 11 5.5 HYB3117800 -50 288 -60 3.3 ± 0.3 V 252 7.2 3.6 mW mW mW Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh and test mode All inputs, outputs and clocks fully TTL (5 V versions) and LV-TTL (3.3 V version)-compatible 2048 refresh cycles / 32 ms (2k-refresh) Plastic Package: P-SOJ-28-3 400 mil Semiconductor Group 1 1998-10-01 HYB 5(3)117800/BSJ-50/-60 2M × 8 DRAM The HYB 5(3)117800 are 16 MBit dynamic RAMs based on the die revisions “G” & “F” and organized as 2 097 152 words by 8-bits. The HYB 5(3)117800 utilizes a submicron CMOS silicon gate process technology, as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 5(3)117800 to be packaged in a standard SOJ-28 plastic package. Package with 400 mil width are available. These packages provide high system bit densities and are compatible with commonly used au...