HYB5117805BJ-50

2M x 8 - Bit Dynamic RAM 2k Refresh (Hyper Page Mode- EDO) Advanced Information HYB5117805BSJ -50/-60/-70 2 097 152 words by 8-bit organization 0 to 70 °C operating temperature Performance: -50 tRAC tCAC tAA tRC tHPC RAS access time CAS access time Access time from address Read/Write cycle time Hyper page mode (EDO) cycle time 50 13 25 84 20 -60 60 15 30 104 25 -70 70 20 35 124 30 ns ns ns ns ns Single + 5 V (± 10 %) supply Low power dissipation max. 660 mW active (-50 version) max. 605 mW active (-60 version) max. 550 mW active (-70 version) 11 mW standby (TTL) 5.5. mW standby (MOS) Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh, self refresh and test mode Hyper page mode (EDO) capability All inputs, outputs and clocks fully TTL-compatible 2048 refresh cycles / 32 ms (2k-Refresh) Plastic Package: P-SOJ-28-3 400 mil Semiconductor Group 1 1.96 HYB5117805BSJ-50/-60/-70 2M x 8-EDO DRAM The HYB 5117805BSJ is a 16 MBit dynamic RAM organized as 2 097 152 words by 8-bits. The HYB 5117805BSJ utilizes a submicron CMOS silicon gate process technology, as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 5117805BSJ to be packaged in a standard SOJ 28 plastic package with 400 mil width. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment....