HYB514175BJ-55

256k × 16-Bit EDO-DRAM HYB 514175BJ-50/-55/-60 Advanced Information 262 144 words by 16-bit organization 0 to 70 °C operating temperature Fast access and cycle time RAS access time: 50 ns (-50 version) 55 ns (-55 version) 60 ns (-60 version) CAS access time: 13 ns (-50 & -55 version) 15 ns (-60 version) Cycle time: 89 ns (-50 version) 94 ns (-55 version) 104 ns (-60 version) Hyper page mode (EDO) cycle time 20 ns (-50 & -55 version) 25 ns (-60 version) High data rate 50 MHz (-50 & -55 version) 40 MHz (-60 version) Single + 5 V (± 10 %) supply with a built-in VBB generator Low Power dissipation max. 1100 mW active (-50 version) max. 1045 mW active (-55 version) max. 935 mW active (-60 version) Standby power dissipation 11 mW standby (TTL) 5.5 mW max. standby (CMOS) Output unlatched at cycle end allows two-dimensional chip selection Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh, hidden-refresh and hyper page (EDO) mode capability 2 CAS/1 WE control All inputs and outputs TTL-compatible 512 refresh cycles/16 ms Plastic Packages: P-SOJ-40-1 400 mil width Semiconductor Group 1 1998-10-01 HYB 514175BJ/BJL-50/-55/-60 256k × 16 EDO-DRAM The HYB 514175BJ is the new generation dynamic RAM organized as 262 144 words by 16-bit. The HYB 514175BJ utilizes CMOS silicon gate process as well as advanced circuit techniques to provide wide operation margins, both internally and for the system user. Multiplexed address inpu...