Data Sheet, Rev. 1.0, Mar. 2004
HYS64D[16/32/64][300/301/320][G/H]U–5–C HYS72D[32/64][300/301/320][G/H]U–5–C HYS64D[16/32/64][300/301/320][G/H]U–6–C HYS72D[32/64][300/301/320][G/H]U–6–C
184-Pin Unbuffered Double Data Rate SDRAM UDIMM DDR SDRAM
Memory Products
N e v e r
s t o p
t h i n k i n g .
Edition 2004-03 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany © Infineon Technologies AG 2004. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
Data Sheet, Rev. 1.0, Mar. 2004
HYS64D[16/32/64][300/301/320][G/H]U–5–C HYS72D[32/64][300/301/320][G/H]U–5–C HYS64D[16/32/64][300/301/320][G/H]U–6–C HYS72D[32/64][300/301/320][G/H]U–6–C
184-Pin Unbuffered Double Data Rate SDRAM UDIMMDDR SDRAM
Memory Products
N e v e r
s t o p
t h i n k i n g .
HYS64D[16/32/64][300/301/320][G/H]U–5–C, HYS72D[32/64][300/301/320][G/H]U–5–C, HYS64D[16/32/64][300/301/320][G/H]U–6–C Revision History: Previous Version: Page all 1 Rev. 1.0 – 2004-03
Subjects (major changes since last revision) new data sheet template Editorial change
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Template: mp_a4_v2.0_2003-06-06.fm
HYS[64/72]D[16/32/64][300/301/320][G/H]U–[5/6]–C Unbuffered DDR SDRAM Modules
1 1.1 1.2 2 3 3.1 3.2 4 5
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Current Conditions and Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SPD Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Data Sheet
5
Rev. 1.0, 2004-03
184-Pin Unbuffered Double Data Rate SDRAM UDIMM
HYS64D[16/32/64][300/301/320][G/H]U–5–C HYS72D[32/64][300/301/320][G/H]U–5–C HYS64D[16/32/64][300/301/320][G/H]U–6–C HYS72D[32/64][300/301/320][G/H]U–6–C
1
1.1
• • • • • • • • • • • • •
Overview
Features
184-Pin Unbuffered Double Data Rate SDRAM (ECC and non-parity) for PC and Server main memory applications One rank 16M x 64, 32M × 64, 32M × 72 and two ranks 64M × 64, 64M × 72 organization JEDEC standard Double Data Rate Synchronous DRAMs (DDR SDRAM) Single +2.5V (± 0.2V) power supply and +2.6V (±0.1V) ppower supply for DDR400 Built with 256 Mbit DDR SDRAM in P-TSOPII-66-1 package Programmable CAS Latency, Burst Length, and Wrap Sequence (Sequential & Interleave) Auto Refresh (CBR) and Self Refresh All inputs and outputs SSTL_2 compatible Serial Presence Detect with E2PROM JEDEC standard MO-206 form .