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HYS64V16220GU-10 Dataheets PDF



Part Number HYS64V16220GU-10
Manufacturers Siemens
Logo Siemens
Description 3.3 V 8M x 64/72-Bit 1 Bank SDRAM Module 3.3 V 16M x 64/72-Bit 2 Bank SDRAM Module
Datasheet HYS64V16220GU-10 DatasheetHYS64V16220GU-10 Datasheet (PDF)

3.3 V 8M × 64/72-Bit 1 Bank SDRAM Module 3.3 V 16M × 64/72-Bit 2 Bank SDRAM Module 168 pin unbuffered DIMM Modules HYS 64/72V8200GU HYS 64/72V16220GU • 168 Pin PC100-compatible unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications 1 bank 8M × 64, 8M × 72 and 2 bank 16M × 64, 16M × 72 organization Optimized for byte-write non-parity or ECC applications JEDEC standard Synchronous DRAMs (SDRAM) Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification SDRAM.

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3.3 V 8M × 64/72-Bit 1 Bank SDRAM Module 3.3 V 16M × 64/72-Bit 2 Bank SDRAM Module 168 pin unbuffered DIMM Modules HYS 64/72V8200GU HYS 64/72V16220GU • 168 Pin PC100-compatible unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications 1 bank 8M × 64, 8M × 72 and 2 bank 16M × 64, 16M × 72 organization Optimized for byte-write non-parity or ECC applications JEDEC standard Synchronous DRAMs (SDRAM) Fully PC board layout compatible to INTEL’s Rev. 1.0 module specification SDRAM Performance -8 -8B 100 6 -10 66 8 Units MHz ns • • • • • fCK tAC • Clock frequency (max.) Clock access time 100 6 Programmed Latencies Product Speed -8 -8B -10 PC100 PC100 PC66 CL 2 3 2 tRCD 2 2 2 tRP 2 3 2 • • Single + 3.3 V (± 0.3 V ) power supply Programmable CAS Latency, Burst Length and Wrap Sequence (Sequential & Interleave) Auto Refresh (CBR) and Self Refresh Decoupling capacitors mounted on substrate All inputs, outputs are LVTTL compatible Serial Presence Detect with E2PROM Utilizes 8M × 8 SDRAMs in TSOPII-54 packages 4096 refresh cycles every 64 ms 133.35 mm × 31.75 mm × 4.00 mm card size with gold contact pads • • • • • • • Semiconductor Group 1 1998-08-01 HYS 64(72)V8200/16220GU-8/-10 SDRAM Modules The HYS 64(72)8200 and HYS 64(72)16220 are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organized as 8M × 64, 8M × 72 in 1 bank and 16M × 64 and 16M × 72 in two banks high speed memory arrays designed with 64M Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use -8 and -8B speed sort 8M 8 SDRAM devices in TSOP-54 packages to meet the PC100 requirement. Modules which use -10 parts are suitable for PC66 applications only. Decoupling capacitors are mounted on the PC board. The PC board design is according to INTEL’s PC SDRAM Rev. 1.0 module specification. The DIMMs have a serial presence detect, implemented with a serial E2PROM using the two pin I2C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128 bytes are available to the end user. All SIEMENS 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133.35 mm long footprint, with 1.25“ ( 31.75 mm) height. Ordering Information Type HYS 64V8200GU-8 HYS 72V8200GU-8 HYS 64V16220GU-8 HYS 72V16220GU-8 HYS 64V8200GU-8B Ordering Code Package Descriptions Module Height 1.25“ 1.25“ 1.25“ 1.25“ 1.25“ 1.25“ 1.25“ 1.25“ 1.25“ 1.25“ PC100-222-620 L-DIM-168-30 100 MHz 8M × 64 1 bank SDRAM module PC100-222-620 L-DIM-168-30 100 MHz 8M × 72 1 bank SDRAM module PC100-222-620 L-DIM-168-30 100 MHz 16M × 64 2 bank SDRAM module PC100-222-620 L-DIM-168-30 100 MHz 16M × 72 2 bank SDRAM module PC100-323-620 L-DIM-168-30 100 MHz 8M × 64 1 bank SDRAM module HYS 64V16220GU-8B PC100-323-620 L-DIM-168-30 100 MHz 16M × 64 2 bank SDRAM module HYS 64V8200GU-10 HYS 72V8200GU-10 PC66-222-920 PC66-222-920 L-DIM-168-30 66 MHz 8M × 64 1 bank SDRAM module L-DIM-168-30 66 MHz 8M × 72 1 bank SDRAM module L-DIM-168-30 66 MHz 16M × 64 2 bank SDRAM module L-DIM-168-30 66 MHz 16M × 72 2 bank SDRAM module HYS 64V16220GU-10 PC66-222-920 HYS 72V16220GU-10 PC66-222-920 Semiconductor Group 2 1998-08-01 HYS 64(72)V8200/16220GU-8/-10 SDRAM Modules Pin Names A0 - A11 BA0, BA1 DQ0 - DQ63 CB0 - CB7 RAS CAS WE CKE0, CKE1 Address Inputs Bank Selects Data Input/Output Check Bits (× 72 organization only) Row Address Strobe Column Address Strobe Read/Write Input Clock Enable CLK0 - CLK3 DQMB0 DQMB7 CS0 - CS3 Clock Input Data Mask Chip Select Power (+ 3.3 Volt) Ground Clock for Presence Detect Serial Data Out for Presence Detect No Connection VCC VSS SCL SDA N.C. Address Format Part Number 8M × 64 8M × 72 HYS 64V8200GU HYS 72V8200GU Rows 12 12 12 12 Columns Bank Select 9 9 9 9 2 2 2 2 Refresh 4k 4k 4k 4k Period 64 ms 64 ms 64 ms 64 ms Interval 15.6 µs 15.6 µs 15.6 µs 15.6 µs 16M × 64 HYS 64V16220GU 16M × 72 HYS 72V16220GU Semiconductor Group 3 1998-08-01 HYS 64(72)V8200/16220GU-8/-10 SDRAM Modules Pin Configuration PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Symbol PIN # 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Symbol PIN # 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 Symbol PIN # 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Symbol VSS DQ0 DQ1 DQ2 DQ3 VSS DU CS2 DQMB2 DQMB3 DU VSS DQ32 DQ33 DQ34 DQ35 VSS CKE0 CS3 DQMB6 DQMB7 NC VCC DQ4 DQ5 DQ6 DQ7 DQ8 VCC DQ36 DQ37 DQ38 DQ39 DQ40 VCC NC NC NC (CB2) NC (CB3) VCC NC NC CB6 CB7 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VSS DQ16 DQ17 DQ18 DQ19 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VSS DQ48 DQ49 DQ50 DQ51 VCC DQ20 NC DU CKE1 VCC DQ52 NC DU NC VCC DQ14 DQ1.


HYS64V16220GDL-8 HYS64V16220GU-10 HYS64V16220GU-8


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