EDI8L32512C

EDI8L32512C FEATURES 512K x 32 CMOS High Speed Static RAM n DSP Memory Solution • Motorola DSP96002 • Analog SHARC DSP • Texas Instruments TMS320C3x, TMS320C4x n Random Access Memory Array • Fast Access Times: 12*, 15, 17, and 20ns • TTL Compatible Inputs and Outputs • Fully Static, No Clocks n Surface Mount Package • 68 Lead PLCC, No. 99 JEDEC M0-47AE • Small Footprint, 0.990 Sq. In. • Multiple Ground Pins for Maximum Noise Immunity n Single +5V (±5%) Supply Operation * Advance Information. FIG. 1 DQ16 A18 A17 E3 E2 E1 E0 NC VCC NC NC G W A16 A15 A14 DQ15 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 DQ17 DQ18 DQ19 V SS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 V SS DQ28 DQ29 DQ30 Note: For memory upgrade information, refer to Page 8, Figure 13 "EDI MCM-L Upgrade Path." DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A9 A8 A7 DQ0 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 August 2000 Rev. 7 ECO #13097 T NO 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 DESCRIPTION The EDI8L32512C is a high speed, 5V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP memory solution. The high speed, 5V supply voltage and control lines make the device ideal for creating floating point DSP memory solutions. The device can be configured as a 512K x 32 and used to create a single chip external data memory solution for TI's TMS320C30/C31 (Figure 8), TMS320C32 (Figure 9) or TMS320C4x (Figure 10), Motoro...