PDI1394P11A

INTEGRATED CIRCUITS PDI1394P11A 3-port physical layer interface Preliminary specification 1999 Mar 10 Philips Semiconductors Philips Semiconductors Preliminary specification 3-port physical layer interface PDI1394P11A 1.0 FEATURES 3 cable interface ports Supports 100Mb/s and 200Mb/s transfers Interfaces to any 1394 standard Link Layer Controller 5V tolerant I/Os with Bus Hold Circuitry Single 3.3V supply voltage Arbitrated (short) Bus Reset (1394a feature) Fully compatible with existing 100 Mbps Phys on the market Prevents a TpBias voltage driven into a non-powered PDI1394P11A from erroneously powering up the part 2.0 DESCRIPTION The Philips Semiconductors PDI1394P11A is an IEEE1394-1995 compliant Physical Layer interface. The PDI1394P11A provides the analog physical layer functions needed to implement a three port node in a cable-based IEEE 1394–1995 network. Additionally, the device manages bus initialization and arbitration cycles, as well as transmission and reception of data bits. The Link Layer Controller interface is compatible with both 3V and 5V Link Controllers. While providing a maximum transmission data rate of 200 Mb/s, the PDI1394P11A is compatible with current 100 Mb/s Physical Layer ICs. The PDI1394P11A is available in the LQFP64 package. 3.0 ORDERING INFORMATION PACKAGE 64-pin plastic LQFP TEMPERATURE RANGE 0°C to +70°C OUTSIDE NORTH AMERICA PDI1394P11A BD NORTH AMERICA PD1394P11A BD PKG. DWG. # SOT314-2 4.0 PIN CONFIGURATION PLLGND...