M50LPW040

M50LPW040 4 Mbit (512Kb x8, Uniform Block) 3V Supply Low Pin Count Flash Memory PRELIMINARY DATA s SUPPLY VOLTAGE – VCC = 3V to 3.6V for Program, Erase and Read Operations – VPP = 12V for Fast Program and Fast Erase (optional) s TWO INTERFACES – Low Pin Count (LPC) Standard Interface for embedded operation with PC Chipsets. – Address/Address Multiplexed (A/A Mux) Interface for programming equipment compatibility. TSOP40 (N) 10 x 20mm PLCC32 (K) s LPC HARDWARE INTERFACE MODE – 5 Signal Communication Interface supporting Read and Write Operations – Hardware Write Protect Pins for Block Protection – Register Based Read and Write Protection – 5 Additional General Purpose Inputs for platform design flexibility – Synchronized with 33 MHz PCI clock 3 ID0-ID2 5 GPI0GPI4 LFRAME CLK IC RP INIT M50LPW040 WP TBL VCC VPP 4 LAD0LAD3 Figure 1. Logic Diagram (LPC Interface) s PROGRAMMING TIME – 10µs typical – Quadruple Byte Programming Option s s 8 UNIFORM 64 Kbyte MEMORY BLOCKS PROGRAM/ERASE CONTROLLER – Embedded Byte Program and Block/Chip Erase algorithms – Status Register Bits s PROGRAM and ERASE SUSPEND – Read other Blocks during Program/Erase Suspend – Program other Blocks during Erase Suspend s s FOR USE in PC BIOS APPLICATIONS ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Device Code: 26h VSS AI05435 March 2002 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/36 M50LPW040 F...