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K4E151611D Dataheets PDF



Part Number K4E151611D
Manufacturers Samsung
Logo Samsung
Description 1M x 16Bit CMOS Dynamic RAM
Datasheet K4E151611D DatasheetK4E151611D Datasheet (PDF)

K4E171611D, K4E151611D K4E171612D, K4E151612D CMOS DRAM 1M x 16Bit CMOS Dynamic RAM with Extended Data Out DESCRIPTION This is a family of 1,048,576 x 16 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K Ref.), access time (-45, -50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional .

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K4E171611D, K4E151611D K4E171612D, K4E151612D CMOS DRAM 1M x 16Bit CMOS Dynamic RAM with Extended Data Out DESCRIPTION This is a family of 1,048,576 x 16 bit Extended Data Out CMOS DRAMs. Extended Data Out Mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle (1K Ref. or 4K Ref.), access time (-45, -50 or -60), power consumption(Normal or Low power) and package type(SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Selfrefresh operation is available in L-version. This 1Mx16 EDO Mode DRAM family is fabricated using Samsung′ s advanced CMOS process to realize high band-width, low power consumption and high reliability. It may be used as graphic memory unit for microcomputer, personal computer and portable machines. FEATURES • Part Identification - K4E171611D-J(T) (5V, 4K Ref.) - K4E151611D-J(T) (5V, 1K Ref.) - K4E171612D-J(T) (3.3V, 4K Ref.) - K4E151612D-J(T) (3.3V, 1K Ref.) • Active Power Dissipation Speed 4K -45 -50 -60 360 324 288 3.3V 1K 540 504 468 4K 550 495 440 Unit : mW 5V 1K 825 770 715 • Extended Data Out Mode operation (Fast Page Mode with Extended Data Out) • 2 CAS Byte/Word Read/Write operation • CAS-before-RAS refresh capability • RAS-only and Hidden refresh capability • Self-refresh capability (L-ver only) • TTL(5V)/LVTTL(3.3V) compatible inputs and outputs • Early Write or output enable controlled write • JEDEC Standard pinout • Available in plastic SOJ 400mil and TSOP(II) packages • Single +5V±10% power supply (5V product) • Single +3.3V±0.3V power supply (3.3V product) • Refresh Cycles Part NO. K4E171611D K4E171612D K4E151611D K4E151612D VCC 5V 3.3V 5V 3.3V 1K 16ms Refresh cycle 4K Refresh period Nor64ms 128ms L-ver RAS UCAS LCAS W FUNCTIONAL BLOCK DIAGRAM Control Clocks Vcc Vss Lower Data in Buffer Sense Amps & I/O Lower Data out Buffer Upper Data in Buffer Upper Data out Buffer VBB Generator Refresh Timer Refresh Control Row Decoder DQ0 to DQ7 • Performance Range Speed -45 -50 -60 Refresh Counter Memory Array 1,048,576 x16 Cells OE DQ8 to DQ15 tRAC 45ns 50ns 60ns tCAC 13ns 15ns 17ns tRC 69ns 84ns 104ns tHPC 16ns 20ns 25ns Remark 5V/3.3V 5V/3.3V 5V/3.3V A0-A11 (A0 - A9)*1 A0 - A7 (A0 - A9)*1 Row Address Buffer Col. Address Buffer Column Decoder Note) *1 : 1K Refresh SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. K4E171611D, K4E151611D K4E171612D, K4E151612D CMOS DRAM PIN CONFIGURATION (Top Views) • K4E17(5)1611(2)D-J • K4E17(5)1611(2)D-T VCC DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 N.C N.C W RAS *A11(N.C) *A10(N.C) A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 VSS DQ15 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ9 DQ8 N.C LCAS UCAS OE A9 A8 A7 A6 A5 A4 VSS VCC DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 N.C N.C N.C W RAS *A11(N.C) *A10(N.C) A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 VSS DQ15 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ9 DQ8 N.C N.C LCAS UCAS OE A9 A8 A7 A6 A5 A4 VSS *A10 and A11 are N.C for K4E151611(2)D(5V/3.3V, 1K Ref. product) J : 400mil 42 SOJ T : 400mil 50(44) TSOP II Pin Name A0 - A11 A0 - A9 DQ0 - 15 VSS RAS UCAS LCAS W OE VCC N.C Pin Function Address Inputs (4K Product) Address Inputs (1K Product) Data In/Out Ground Row Address Strobe Upper Column Address Strobe Lower Column Address Strobe Read/Write Input Data Output Enable Power(+5V) Power(+3.3V) No Connection K4E171611D, K4E151611D K4E171612D, K4E151612D ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Output Current Symbol 3.3V VIN,VOUT VCC Tstg PD IOS Address -0.5 to +4.6 -0.5 to +4.6 -55 to +150 1 50 Rating CMOS DRAM Units 5V -1.0 to +7.0 -1.0 to +7.0 -55 to +150 1 50 V V °C W mA * Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, TA= 0 to 70°C) Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol Min VCC VSS VIH VIL 3.0 0 2.0 -0.3*2 3.3V Typ 3.3 0 Max 3.6 0 VCC+0.3*1 0.8 Min 4.5 0 2.4 -1.0*2 5V Typ 5.0 0 Max 5.5 0 VCC+1.0*1 0.8 V V V V Units *1 : VCC+1.3V/15ns(3.3V), VCC+2.0V/20ns(5V), Pulse width is measured at VCC *2 : -1.3V/15ns(3.3V), -2.0V/20ns(5V), Pulse width is measured at VSS DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.) Max Parameter Input Leakage Current (Any input 0≤VI.


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