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K4F640811B Dataheets PDF



Part Number K4F640811B
Manufacturers Samsung
Logo Samsung
Description 8M x 8bit CMOS Dynamic RAM
Datasheet K4F640811B DatasheetK4F640811B Datasheet (PDF)

K4F660811B,K4F640811B CMOS DRAM 8M x 8bit CMOS Dynamic RAM with Fast Page Mode DESCRIPTION This is a family of 8,388,608 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), package type (SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 8Mx8 Fast Page Mode D.

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K4F660811B,K4F640811B CMOS DRAM 8M x 8bit CMOS Dynamic RAM with Fast Page Mode DESCRIPTION This is a family of 8,388,608 x 8 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -50 or -60), package type (SOJ or TSOP-II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 8Mx8 Fast Page Mode DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low power consumption and high reliability. FEATURES • Part Identification - K4F660811B-JC(5.0V, 8K Ref.) - K4F640811B-JC(5.0V, 4K Ref.) - K4F660811B-TC(5.0V, 8K Ref.) - K4F640811B-TC(5.0V, 4K Ref.) • Fast Page Mode operation • CAS-before-RAS refresh capability • RAS-only and Hidden refresh capability • Fast parallel test mode capability • TTL(5.0V) compatible inputs and outputs • Early Write or output enable controlled write • Active Power Dissipation Unit : mW Speed -45 -50 -60 8K 550 495 440 4K 715 660 605 • JEDEC Standard pinout • Available in Plastic SOJ and TSOP(II) packages • +5.0V±10% power supply • Refresh Cycles Part NO. K4F660811B* K4F640811B Refresh cycle 8K 4K Refresh time Normal 64ms RAS CAS W Control Clocks Vcc Vss FUNCTIONAL BLOCK DIAGRAM VBB Generator Refresh Control Refresh Counter Memory Array 8,388,608 x 8 Cells Sense Amps & I/O * Access mode & RAS only refresh mode : 8K cycle/64ms CAS-before-RAS & Hidden refresh mode : 4K cycle/64ms Refresh Timer Row Decoder Data in Buffer DQ0 to DQ7 Data out Buffer OE • Performance Range Speed -45 -50 -60 tRAC 45ns 50ns 60ns tCAC 12ns 13ns 15ns tRC 80ns 90ns 110ns tPC 31ns 35ns 40ns A0~A12 (A0~A11)*1 A0~A9 (A0~A10)*1 Row Address Buffer Col. Address Buffer Column Decoder Note) *1 : 4K Refresh SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. K4F660811B,K4F640811B CMOS DRAM PIN CONFIGURATION (Top Views) • K4F660811B-J • K4F640811B-J VCC DQ0 DQ1 DQ2 DQ3 N.C VCC W RAS A0 A1 A2 A3 A4 A5 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VSS DQ7 DQ6 DQ5 DQ4 VSS CAS OE A12(N.C)* A11 A10 A9 A8 A7 A6 VSS VCC DQ0 DQ1 DQ2 DQ3 N.C VCC W RAS A0 A1 A2 A3 A4 A5 VCC • K4F660811B-T • K4F640811B-T 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VSS DQ7 DQ6 DQ5 DQ4 VSS CAS OE A12(N.C)* A11 A10 A9 A8 A7 A6 VSS (J : 400mil SOJ) (T : 400mil TSOP(II)) * (N.C) : N.C for 4K Refresh product Pin Name A0 - A12 A0 - A11 DQ0 - 7 VSS RAS CAS W OE VCC N.C Pin Function Address Inputs(8K Product) Address Inputs(4K Product) Data In/Out Ground Row Address Strobe Column Address Strobe Read/Write Input Data Output Enable Power(+5.0V) No Connection K4F660811B,K4F640811B ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on V CC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Output Current Symbol VIN,VOUT VCC Tstg PD IOS Address Rating -1.0 to +7.0 -1.0 to +7.0 -55 to +150 1 50 CMOS DRAM Units V V °C W mA * Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS (Voltage referenced to Vss, TA= 0 to 70°C) Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL Min 4.5 0 2.4 -1.0 *2 Typ 5.0 0 Max 5.5 0 VCC+1.0 *1 0.8 Units V V V V *1 : VCC+2.0V at pulse width≤20ns which is measured at VCC *2 : -2.0 at pulse width≤20ns which is measured at V SS DC AND OPERATING CHARACTERISTICS (Recommended operating conditions unless otherwise noted.) Parameter Input Leakage Current (Any input 0≤VIN≤VCC+0.5V, all other pins not under test=0 Volt) Output Leakage Current (Data out is disabled, 0V≤VOUT ≤VCC) Output High Voltage Level(IOH =-5mA) Output Low Voltage Level(I OL=4.2mA) Symbol II(L) IO(L) VOH VOL Min -5 -5 2.4 Max 5 5 0.4 Units uA uA V V K4F660811B,K4F640811B DC AND OPERATING CHARACTERISTICS (Continued) Max Symbol Power Speed K4F660811B ICC1 ICC2 ICC3 Don′t care Normal Don′t care -45 -50 -60 Don ′t care -45 -50 -60 -45 -50 -60 Don′t care -45 -50 -60 100 90 80 2 100 90 80 70 60 50 1 100 90 80 K4F640811B 130 120 110 2 130 120 110 80 70 60 1 130 120 110 CMOS DRAM Units mA mA mA mA mA mA mA mA mA mA mA mA mA mA ICC4 ICC5 ICC6 Don′t care Normal Don′t care ICC1* : Operating Current (RAS and CAS, Address cycling @tRC=min.) ICC2 : Standby Current (RAS=CAS=W=VIH ) ICC3* : RAS-only Refresh Current (CAS=V IH, RAS, Address cycling @tRC=min.) ICC4* : Fast Page Mode Current (RAS=VIL, CAS, Address cycling @ tPC=min.) ICC5 : Standby Current (RAS=CAS=W=VCC-0.2V) ICC6* : CAS-Before-RAS Refresh Current (RAS and CAS.


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