K4J55323QF-GC

K4J55323QF-GC 256M GDDR3 SDRAM 256Mbit GDDR3 SDRAM 2M x 32Bit x 4 Banks Graphic Double Data Rate 3 Synchronous DRAM with Uni-directional Data Strobe and DLL (144 - Ball FBGA) Revision 1.7 January 2005 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev 1.7 (Jan. 2005) K4J55323QF-GC Revision History Revision 1.7 (Jan. 18 , 2005) - Added Lead Free package part number in the data sheet. 256M GDDR3 SDRAM Revision 1.6 (Dec 2 , 2004) - Changed ICC2P and ICC6 for all frequency. Separted ICC6 for -GC and -GL. Revision 1.5 (Oct 5 , 2004) - Added K4J55323QF-G(V)C15 - Timing diagram corrected on page 28 Revision 1.4 (July 9 , 2004) - Added K4J55323QF-G(V)L20 which is VDD&VDDQ=1.8V(typical) Revision 1.3 (June 14 , 2004) - Changed DC spec value for all the frequency. Refer to the DC characteristics of page 45. - Removed -GC12 from the spec. Revision 1.2 (February 18 , 2004) - Changed VDD/VDDQ from 1.9V+ 0.1V to 2.0V+ 0.1V in all frequencies. - DC changes : Refer to the DC characteristics of page 45. Revision 1.1 (January 29 , 2004) - Typo corrected Revision 1.0 (January 15 , 2004) - Changed VDD/VDDQ of K4J55323QF-GC12 from 2.1V+ 0.1V to 1.9V+ 0.1V - Changed VDD/VDDQ of K4J55323QF-GC14/16/20 from 1.8V+ 0.1V to 1.9V+ 0.1V - Changed tCK(max) from 3.0ns to 3.3ns - DC spec finalized. Typo corrected - 2 - Rev 1.7 (Jan. 2005) K4J55323QF-GC Revision History Revision 0.5 (January 7 , 2004) - Preliminary spec - Added "Dummy MRS" com...