K4M511533E-Y

K4M511533E - Y(P)C/L/F 8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA FEATURES 3.0V or 3.3V power supply. LVCMOS compatible with multiplexed address. Four banks operation. MRS cycle with address key programs. -. CAS latency (1, 2 & 3). -. Burst length (1, 2, 4, 8 & Full page). -. Burst type (Sequential & Interleave). EMRS cycle with address key programs. All inputs are sampled at the positive going edge of the system clock. Burst read single-bit write operation. Special Function Support. -. PASR (Partial Array Self Refresh). -. Internal TCSR (Temperature Compensated Self Refresh) DQM for masking. Auto refresh. 64ms refresh period (8K cycle). Commercial Temperature Operation (-25°C ~ 70°C). 2 /CS Support. 2chips DDP 54Balls FBGA with 0.8mm ball pitch ( -YXXX : Leaded , -PXXX : Lead Free). Mobile-SDRAM GENERAL DESCRIPTION The K4M511533E is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications. ORDERING INFORMATION Part No. K4M511533E-Y(P)C/L/F75 K4M511533E-Y(P)C/L/F1H K4M511533E-Y(P)C/L/F1L Max Freq. 133MHz(CL=3) 105M...