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K9W8G08U1M Dataheets PDF



Part Number K9W8G08U1M
Manufacturers Samsung
Logo Samsung
Description 512M x 8 Bit / 256M x 16 Bit NAND Flash Memory
Datasheet K9W8G08U1M DatasheetK9W8G08U1M Datasheet (PDF)

K9W8G08U1M K9K4G08Q0M K9K4G08U0M K9K4G16Q0M K9K4G16U0M FLASH MEMORY Document Title 512M x 8 Bit / 256M x 16 Bit NAND Flash Memory Revision History Revision No 0.0 0.1 0.2 History 1. Initial issue 1. Add two-K9K4GXXU0M-YCB0/YIB0 Stacked Package 1. The 3rd Byte ID after 90h ID read command is don’ t cared. The 5th Byte ID after 90h ID read command is deleted. 1. The K9W8G16U1M-YCB0,YIB0,PCB0,PIB0 is deleted in line up. 2. Note is added. (VIL can undershoot to -0.4V and VIH can overshoot to VC.

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Document
K9W8G08U1M K9K4G08Q0M K9K4G08U0M K9K4G16Q0M K9K4G16U0M FLASH MEMORY Document Title 512M x 8 Bit / 256M x 16 Bit NAND Flash Memory Revision History Revision No 0.0 0.1 0.2 History 1. Initial issue 1. Add two-K9K4GXXU0M-YCB0/YIB0 Stacked Package 1. The 3rd Byte ID after 90h ID read command is don’ t cared. The 5th Byte ID after 90h ID read command is deleted. 1. The K9W8G16U1M-YCB0,YIB0,PCB0,PIB0 is deleted in line up. 2. Note is added. (VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for durations of 20 ns or less.) 3. Pb-free Package is added. K9K4G08Q0M-PCB0,PIB0 K9K4G08U0M-PCB0,PIB0 K9K4G16U0M-PCB0,PIB0 K9K4G16Q0M-PCB0,PIB0 K9W8G08U1M-PCB0,PIB0 1. Added Addressing method for program operation. 1. The tADL(Address to Data Loading Time) is added. - tADL Minimum 100ns - tADL is the time from the WE rising edge of final address cycle to the WE rising edge of first data cycle at program operation. 2. Added addressing method for program operation 3. PKG(TSOP1) Dimension Change Draft Date Feb. 19. 2003 Mar. 31. 2003 Apr. 9. 2003 Remark Advance Preliminary Preliminary 0.3 Apr. 30. 2003 Preliminary 0.4 0.5 Jan. 27. 2004 May.31. 2004 Preliminary The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the SAMSUNG branch office near your office. 1 K9W8G08U1M K9K4G08Q0M K9K4G08U0M K9K4G16Q0M K9K4G16U0M FLASH MEMORY 512M x 8 Bit / 256M x 16 Bit NAND Flash Memory PRODUCT LIST Part Number K9K4G08Q0M-Y K9K4G16Q0M-Y K9XXG08UXM-Y K9K4G16U0M-Y 2.7 ~ 3.6V Vcc Range 1.70 ~ 1.95V Organization X8 X16 X8 X16 TSOP1 PKG Type FEATURES • Voltage Supply -1.8V device(K9K4GXXQ0M): 1.70V~1.95V -3.3V device(K9XXGXXUXM): 2.7 V ~3.6 V • Organization - Memory Cell Array -X8 device(K9XXG08XXM) : (512M + 16,384K)bit x 8bit -X16 device(K9XXG16XXM) : (256M + 8,192K)bit x 16bit - Data Register -X8 device(K9XXG08XXM): (2K + 64)bit x8bit -X16 device(K9XXG16XXM): (1K + 32)bit x16bit - Cache Register -X8 device(K9XXG08XXM) : (2K + 64)bit x8bit -X16 device(K9XXG16XXM) : (1K + 32)bit x16bit • Automatic Program and Erase - Page Program -X8 device(K9XXG08XXM) : (2K + 64)Byte -X16 device(K9XXG16XXM) : (1K + 32)Word - Block Erase -X8 device(K9XXG08XXM) : (128K + 4K)Byte -X16 device(K9XXG16XXM) : (64K + 2K)Word • Page Read Operation - Page Size - X8 device(K9XXG08XXM) : 2K-Byte - X16 device(K9XXG16XXM) : 1K-Word - Random Read : 25µs(Max.) - Serial Access : 50ns(Min.) 30ns(Min., K9XXG08UXM only) • Fast Write Cycle Time - Program time : 300µs(Typ.) - Block Erase Time : 2ms(Typ.) • Command/Address/Data Multiplexed I/O Port • Hardware Data Protection - Program/Erase Lockout During Power Transitions • Reliable CMOS Floating-Gate Technology - Endurance : 100K Program/Erase Cycles - Data Retention : 10 Years • Command Register Operation • Cache Program Operation for High Performance Program • Power-On Auto-Read Operation • Intelligent Copy-Back Operation • Unique ID for Copyright Protection • Package : - K9XXGXXXXM-YCB0/YIB0 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) - K9W8G08U1M-YCB0/YIB0 : Two K9K4G08U0M stacked. 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) - K9XXGXXXXM-PCB0/PIB0 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) - K9W8G08U1M-PCB0/PIB0 : Two K9K4G08U0M stacked. 48 - Pin TSOP I (12 x 20 / 0.5 mm pitch) GENERAL DESCRIPTION Offered in 512Mx8bit or 256Mx16bit, the K9XXGXXXXM is 4G bit with spare 128M bit capacity. Its NAND cell provides the most cost-effective solution for the solid state mass storage market. A program operation can be performed in typical 300µs on the 2112byte(X8 device) or 1056-word(X16 device) page and an erase operation can be performed in typical 2ms on a 128K-byte(X8 device) or 64K-word(X16 device) block. Data in the data page can be read out at 50ns cycle time per byte(30ns, only X8 3.3v device) or word(X16 device). The I/O pins serve as the ports for address and data input/output as well as command input. The on-chip write controller automates all program and erase functions including pulse repetition, where required, and internal verification and margining of data. Even the write-intensive systems can take advantage of the K9XXGXXXXM′s extended reliability of 100K program/erase cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm. The K9XXGXXXXM is an optimum solution for large nonvolatile storage applications such as solid state file storage and other portable applications requiring non-volatility. An ultra high density solution having two 4Gb stacked with two chip selects is also available in standard TSOPI package. 2 K9W8G08U1M K9K4G08Q0M K9K4G08U0M K9K4G16Q0M K9K4G16U0M FLASH MEMORY PIN CONFIGURATION (TSOP1) K9K4GXXXXM-YCB0,PCB0/YIB0,PIB0 X16 N.C N.C N.C N.C N.C N.C R/B RE CE N.C N.C Vcc Vss N.C N.C CLE ALE WE WP N.C N.C N.C N.C N.C X8 N.C .


K9W4G16U1M K9W8G08U1M K9XXG08UXM-E


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