PDTA114

DISCRETE SEMICONDUCTORS DATA SHEET M3D173 PDTA114EE PNP resistor-equipped transistor Preliminary specification Supersedes data of 1997 Jul 03 File under Discrete Semiconductors, SC04 1998 Jul 23 Philips Semiconductors Preliminary specification PNP resistor-equipped transistor FEATURES Built-in bias resistors R1 and R2 (typ. 10 kΩ each) Simplification of circuit design Reduces number of components and board space. APPLICATIONS Especially suitable for space reduction in interface and driver circuits Inverter circuit configurations without use of external resistors. DESCRIPTION PNP resistor-equipped transistor in an SC-75 plastic package. NPN complement: PDTC114EE. PINNING PIN 1 2 3 DESCRIPTION base/input emitter/ground (+) collector/output MGA893 - 1 PDTA114EE handbook, halfpage 3 R1 1 R2 3 1 Top view 2 MAM345 2 Fig.1 Simplified outline (SC-75) and symbol. MARKING TYPE NUMBER PDTA114EE 2 1 3 MARKING CODE 03 Fig.2 Equivalent inverter symbol. QUICK REFERENCE DATA SYMBOL VCEO IO ICM Ptot hFE R1 R2 -----R1 PARAMETER collector-emitter voltage output current (DC) peak collector current total power dissipation DC current gain input resistor resistor ratio Tamb ≤ 25 °C IC = −5 mA; VCE = −5 V CONDITIONS open base − − − − 30 7 0.8 MIN. − − − − − 10 1 TYP. MAX. −50 −100 −100 150 − 13 1.2 kΩ UNIT V mA mA mW 1998 Jul 23 2 Philips Semiconductors Preliminary specification PNP resistor-equipped transistor LIMITING VALUES In accordance with the Absolute Maximum ...