Digital Audio Interface Receiver
Ordering number : EN4128B
CMOS LSI
LC8900KQ
Digital Audio Interface Receiver
Preliminary Overview
The LC8900KQ is a CM...
Description
Ordering number : EN4128B
CMOS LSI
LC8900KQ
Digital Audio Interface Receiver
Preliminary Overview
The LC8900KQ is a CMOS LSI circuit chip that can be used to enable the EIAJ CP-1201 formatted data transmission between digital audio equipment. It is used by the receiving end and operates synchronously with input signals. This chip demodulates input signals into normally-formatted signals.
Applicational and Functional Concept
Features
On-chip PLL circuit: enables the LSI operation to be synchronous to the transmitted EIAJ format input signals. Four input pins and one output pin: The output pin enables the input data to be sent as they are. Two data output function modes: 20-bit data LSB first mode and 16-bit data MSB first mode. Four output clocks: Bit clock, LRCK, 384Fs and 256Fs. All these clocks are synchronized to the data. Various signal outputs: copy inhibit, emphasis on:off control, user’s bit, validity flag and sampling frequency. LPF time constant select mode: This function can be used in the PLL lock-up state. Error detect signal output: If an input data error is detected, this LSI circuit chip outputs the error signal. In this case, the previous data will be output by the chip. Lock-up signal output: This signal is output when the internal PLL (Phase Locked Loop) block of the LSI circuit chip is locked. The chip has the pin to receive a signal for stopping the PLL operation. Control and processing mode via microcontroller interface: input pin ...
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