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LMC1983 Dataheets PDF



Part Number LMC1983
Manufacturers National Semiconductor
Logo National Semiconductor
Description Digitally-Controlled Stereo Tone and Volume Circuit with Three Selectable Stereo Inputs
Datasheet LMC1983 DatasheetLMC1983 Datasheet (PDF)

LMC1983 Digitally-Controlled Stereo Tone and Volume Circuit with Three Selectable Stereo Inputs August 1992 LMC1983 Digitally-Controlled Stereo Tone and Volume Circuit with Three Selectable Stereo Inputs General Description The LMC1983 is a monolithic integrated circuit that provides volume, balance, tone (bass and treble), loudness controls and selection between three pairs of stereo inputs. These functions are digitally controlled through a three-wire communication interface. There are two d.

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LMC1983 Digitally-Controlled Stereo Tone and Volume Circuit with Three Selectable Stereo Inputs August 1992 LMC1983 Digitally-Controlled Stereo Tone and Volume Circuit with Three Selectable Stereo Inputs General Description The LMC1983 is a monolithic integrated circuit that provides volume, balance, tone (bass and treble), loudness controls and selection between three pairs of stereo inputs. These functions are digitally controlled through a three-wire communication interface. There are two digital inputs for easy interface to other audio peripherals such as stereo decoders. The LMC1983 is designed for line level input signals (300 mV–2V) and has a maximum gain of −0.5 dB. Volume is set at minimum and tone controls are flat when supply voltage is first applied. Low noise and distortion result from using analog switches and poly-silicon resistor networks in the signal path. Additional tone control can be achieved using the LMC835 stereo 7-band graphic equalizer connected to the LMC1983’s SELECT OUT/SELECT IN external processor loop. n n n n n n n n n n n Three pairs of stereo inputs Loudness compensation 40 position 2 dB/step volume attenuator plus mute Independent left and right volume controls Low noise-suitable for use with DNR ® and Dolby ® noise reduction External processor loop Signal handling suitable for compact discs Pop-free switching Serially programmable: INTERMETAL bus (IM) interface 6V to 12V single supply operation 28 Pin DIP or PLCC Package Applications n n n n n Stereo television Music reproduction systems Sound reinforcement systems Electronic music (MIDI) Personal computer audio control Features n Low noise and distortion Block Diagram DS011279-1 DNR ® is a registered trademark of National Semiconductor Corporation. Dolby ® is a registered trademark of Dolby Labs. © 1999 National Semiconductor Corporation DS011279 www.national.com Absolute Maximum Ratings 2) (Notes 1, If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V+ − GND) Voltage at any Pin Input Current at any Pin (Note 3) Package Input Current (Note 3) Power Dissipation (Note 4) Junction Temperature Storage Temperature 15V GND − 0.2V to V+ + 0.2V 5 mA 20 mA 500 mW +125˚C −65˚C to +150˚C Lead Temperature N Package, (Soldering, 10 Seconds) V Package, (Vapor Phase, 60 Seconds) Infrared, (15 Seconds) ESD Susceptability (Note 5) +260˚C 215˚C 220˚C 2 kV Operating Ratings (Notes 1, 2) Temperature Range LMC1983CIN, LMC1983CIV Supply Voltage Range (V+ − V−) TMIN ≤ TA ≤ TMAX −40˚C ≤ TA ≤ +85˚C 6V to 12V Electrical Characteristics The following specifications apply for V+ = 9V, fIN = 1 kHz, input signal (300 mV) applied to INPUT 1, volume = 0 dB, bass = 0 dB, treble = 0 dB, and loudness is off unless otherwise specified. All limits apply for TA = TJ = +25˚C. Symbol IS VIN THD Parameter Supply Current Input Voltage Total Harmonic Distortion Clipping Level (1.0% THD), Select Out (Pins 7, 22) Left and Right channels; Output Pins 13, 16 VIN = 0.3 Vrms; fIN = 100 Hz, 1 kHz, 10 kHz VIN = 2.0 Vrms; fIN = 100 Hz, 1 kHz VIN = 2.0 Vrms; fIN = 10 kHz VIN = 0.5 Vrms; Bass and Treble Tone Controls Set at Maximum VIN = 0.3 Vrms; Volume Attenuator at −20 dB, Bass and Treble DC Shifts Tone Controls Set at Maximum VIN = 0.3 Vrms; between Any Two Adjacent Control Settings VIN = 0.3 Vrms; All Mode and Input Positions ROUT RIN AC Output Impedance AC Input Impedance Volume Attenuator Range Pins 7, 22, (470Ω to Ground at Input) Pins 13, 16 Pins 4, 5, 23, 24, 25 Pins 13, 16; Volume Attenuation at 0100010XXX000000 (0 dB) 0100010XXX101XXX (80 dB); (Relative to Attenuation at the 0 dB Setting) Volume Step Size All Volume Attenuation Settings from 0100010XXX101XXX (80 dB) to 0100010XXX000000 (0 dB) (Note 9) 2.0 1.5 2.5 dB (min) dB (min) 80 78 82 dB (min) dB (max) 150 26 50 0.5 200 40 72 35 1.5 Ω (max) Ω (max) kΩ (max) kΩ (min) dB (max) 0.06 2.0 18 0.15 4.0 20 % (max) mV (max) mV (max) 0.008 0.4 0.5 0.07 0.1 1.0 1.0 0.5 % (max) % (max) % (max) % (max) Conditions Typical (Note 6) 15 2.3 Limit (Note 7) 25 2.0 Unit (Limit) mA (max) Vrms (min) www.national.com 2 Electrical Characteristics Symbol Parameter (Continued) The following specifications apply for V+ = 9V, fIN = 1 kHz, input signal (300 mV) applied to INPUT 1, volume = 0 dB, bass = 0 dB, treble = 0 dB, and loudness is off unless otherwise specified. All limits apply for TA = TJ = +25˚C. Conditions All Volume Attenuation Settings from Channel-to-Channel Tracking Error 0100010XXX100110 (76 dB) to 0100010XXX000000 (0 dB) from 0100010XXX101XXX (80 dB) to 0100010XXX100111 (78 dB) Mute Attenuation Bass Gain Range Bass Tracking Error Bass Step Size Treble Gain Range Treble Tracking Error Treble Step Size Frequency Response VIN = 1.0 Vrms fIN = 100 Hz, Pins 13, 16 fIN = 100 Hz, Pins 13, 16 fIN = 100 Hz, Pins 13, 16 (Relative to Previous Level) fIN = 10 kHz, Pins 13, 16 fIN = 10 .


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