LMX3162

LMX3162 Single Chip Radio Transceiver PRELIMINARY March 2000 LMX3162 Single Chip Radio Transceiver General Description The LMX3162 Single Chip Radio Transceiver is a monolithic, integrated radio transceiver optimized for use in ISM 2.45 GHz wireless systems. It is fabricated using National’s ABiC V BiCMOS process (fT = 18 GHz). The LMX3162 contains phase locked loop (PLL), transmit and receive functions. The 1.3 GHz PLL is shared between transmit and receive sections. The transmitter includes a frequency doubler, and a high frequency buffer. The receiver consists of a 2.5 GHz low noise mixer, an intermediate frequency (IF) amplifier, a high gain limiting amplifier, a frequency discriminator, a received signal strength indicator (RSSI), and an analog DC compensation loop. The PLL, doubler, and buffers can be used to implement open loop modulation along with an external VCO and loop filter. The circuit features on-chip voltage regulation to allow supply voltages ranging from 3.0V to 5.5V. Two additional voltage regulators provide a stable supply source to external discrete stages in the Tx and Rx chains. The IF amplifier, high gain limiting amplifier, and discriminator are optimized for 110 MHz operation, with a total IF gain of 85 dB. The single conversion receiver architecture provides a low cost, high performance solution for communications systems. The RSSI output may be used for channel quality monitoring. The Single Chip Radio Transceiver is available in a 48-pin 7mm X ...