MC100EPT24

MC100EPT24 3.3 V LVTTL/LVCMOS to Differential LVECL Translator Description The MC100EPT24 is a LVTTL/LVCMOS to differential LVECL translator. Because LVECL levels and LVTTL/LVCMOS levels are used, a −3.3 V, +3.3 V and ground are required. The small outline 8-lead package and the single gate of the EPT24 makes it ideal for those applications where space, performance, and low power are at a premium. Features 350 ps Typical Propagation Delay Maximum Input Clock Frequency = > 1.0 GHz Typical The 100 Series Contains Temperature Compensation Operating Range: VCC = 3.0 V to 3.6 V; VEE = −3.6 V to −3.0 V; GND = 0 V PNP LVTTL Input for Minimal Loading Q Output will Default HIGH with Input Open These Devices are Pb-Free, Halogen Free and are RoHS Compliant www.onsemi.com 8 1 8 1 SOIC−8 NB TSSOP−8 DFN8 D SUFFIX DT SUFFIX MN SUFFIX CASE 751−07 CASE 948R−02 CASE 506AA MARKING DIAGRAMS* 8 KPT24 ALYW G 1 SOIC−8 NB 8 KA24 ALYWG G 1 TSSOP−8 ...