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MC100LVEL91

ON Semiconductor

Triple PECL to ECL Translator

MC100LVEL91 3.3 V Triple LVPECL Input to -3.3 V to -5.0 V ECL Output Translator Description The MC100LVEL91 is a triple...


ON Semiconductor

MC100LVEL91

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Description
MC100LVEL91 3.3 V Triple LVPECL Input to -3.3 V to -5.0 V ECL Output Translator Description The MC100LVEL91 is a triple LVPECL input to ECL output translator. The device receives low voltage differential PECL signals, determined by the VCC supply level, and translates them to differential −3.3 V to −5.0 V ECL output signals. To accomplish the level translation the LVEL91 requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01 mF capacitors. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled to GND. This condition will force the Q output to a low, ensuring stability. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VB...




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