MC10131

MC10131 Dual Type D Master-Slave Flip-Flop The MC10131 is a dual master–slave type D flip–flop. Asynchronous Set (S) and Reset (R) override Clock (CC) and Clock Enable (CE) inputs. Each flip–flop may be clocked separately by holding the common clock in the low state and using the enable inputs for the clocking function. If the common clock is to be used to clock the flip–flop, the Clock Enable inputs must be in the low state. In this case, the enable inputs perform the function of controlling the common clock. The output states of the flip–flop change on the positive transition of the clock. A change in the information present at the data (D) input will not affect the output information at any other time due to master slave construction. PD = 235 mW typ/pkg (No Load) FTog = 160 MHz typ tpd = 3.0 ns typ tr, tf = 2.5 ns typ (20%–80%) DIP PIN ASSIGNMENT VCC1 Q1 Q1 R1 S1 CE1 D1 VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 Q2 Q2 R2 S2 CE2 D2 CC C L H H www.DataSheet4U.com http://onsemi.com MARKING DIAGRAMS 16 CDIP–16 L SUFFIX CASE 620 1 16 PDIP–16 P SUFFIX CASE 648 1 1 PLCC–20 FN SUFFIX CASE 775 10131 AWLYYWW MC10131P AWLYYWW MC10131L AWLYYWW A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week CLOCKED TRUTH TABLE D X L H Qn+1 Qn L H Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). LOGIC DIAGRAM S1 5 D1 7 CE1 6 Q1 R1 4 CC 9 R2 13 Q2 CE2 11 D2 10 ...