MC10141

MC10141 Four Bit Universal Shift Register The MC10141 is a four–bit universal shift register which performs shift left, or shift right, serial/parallel in, and serial/parallel out operations with no external gating. Inputs S1 and S2 control the four possible operations of the register without external gating of the clock. The flip–flops shift information on the positive edge of the clock. The four operations are stop shift, shift left, shift right, and parallel entry of data. The other six inputs are all data type inputs; four for parallel entry data, and one for shifting in from the left (DL) and one for shifting in from the right (DR). PD = 425 mW typ/pkg (No Load) fShift = 200 MHz typ tr, tf = 2.0 ns typ (20%–80%) LOGIC DIAGRAM D3 S1 S2 1 of 4 Decode r DR Parallel Enter D2 D1 D0 http://onsemi.com MARKING DIAGRAMS 16 CDIP–16 L SUFFIX CASE 620 1 16 PDIP–16 P SUFFIX CASE 648 1 1 PLCC–20 FN SUFFIX CASE 775 10141 AWLYYWW MC10141P AWLYYWW MC10141L AWLYYWW Shift Right Shift Left Hold www.DataSheet4U.com DL DQ C C DQ C DQ C DQ C A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week DIP PIN ASSIGNMENT Q0 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 Q3 Q2 Q1 VCC1 Q2 Q3 C 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 Q1 Q0 DL D0 D1 S1 D2 TRUTH TABLE SELECT S1 L L H H S2 L H L H OPERATING MODE Parallel Entry Shift Right* Shift Left* Stop Shift Q0n+1 D0 Q1n DL Q0n OUTPUTS Q1n+1 D1 Q2n Q0n Q1n Q2n+1 D2 Q3n Q1n Q2n Q3n+1 D3 DR Q2n Q3n DR D3 S2 VEE *Outputs as ex...