MC10173

MC10173 Quad 2-Input Multiplexer/ Latch The MC10173 is a quad two channel multiplexer with latch. It incorporates common clock and common data select inputs. The select input determines which data input is enabled. A high (H) level enables data inputs D00, D10, D20, and D30 and a low (L) level enables data inputs D01, D11, D21, D31. Any change on the data input will be reflected at the outputs while the clock is low. The outputs are latched on the positive transition of the clock. While the clock is in the high state, a change in the information present at the data inputs will not affect the output information. PD = 275 mW typ/pkg (No Load) tpd = 2.5 ns typ tr, tf = 2.0 ns typ (20%–80%) LOGIC DIAGRAM SELECT 9 1 Q0 PLCC–20 FN SUFFIX CASE 775 www.DataSheet4U.com http://onsemi.com MARKING DIAGRAMS 16 CDIP–16 L SUFFIX CASE 620 1 16 PDIP–16 P SUFFIX CASE 648 1 1 10173 AWLYYWW MC10173P AWLYYWW MC10173L AWLYYWW D00 6 D01 5 D10 4 D11 3 2 Q1 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week DIP PIN ASSIGNMENT D20 13 D21 12 15 Q2 Q0 Q1 D11 D10 D30 11 D31 10 CLOCK 7 14 Q3 D01 VCC = PIN 16 VEE = PIN 8 D00 CLOCK VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Q2 Q3 D20 D21 D30 D31 SELECT TRUTH TABLE SELECT H L X CLOCK L L H Q0n+1 D00 D01 Q0n Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). ORDERING INFORMATION Device MC10173L MC10173P MC10173FN Package C...