MC10176

MC10176 Hex D Master/Slave Flip-Flop The MC10176 contains six high-speed, master slave type “D” flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place on the positive-going Clock transition. Thus, outputs may change only on a positive-going Clock transition. A change in the information present at the data (D) input will not affect the output information any other time due to the master-slave construction of this device. PD = 460 mW typ/pkg (No Load) ftoggle = 150 MHz (typ) tr, tf = 2.0 ns typ (20%–80%) LOGIC DIAGRAM D0 5 2 Q0 PLCC–20 FN SUFFIX CASE 775 http://onsemi.com MARKING DIAGRAMS 16 CDIP–16 L SUFFIX CASE 620 1 16 PDIP–16 P SUFFIX CASE 648 1 MC10176P AWLYYWW 1 10176 AWLYYWW MC10176L AWLYYWW D1 6 3 Q1 www.DataSheet4U.com D2 7 4 Q2 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week DIP PIN ASSIGNMENT D3 10 13 Q3 VCC1 Q0 D4 11 14 Q4 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 CLOCK D5 9 12 15 Q5 Q1 Q2 D0 D1 D2 VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 Q5 Q4 Q3 D5 D4 D3 CLOCK CLOCKED TRUTH TABLE C L H* H* D X L H Qn+1 Qn L H Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). ORDERING INFORMATION Device MC10176L MC10176P MC10176FN Package CDIP–16 PDIP–16 PLCC–20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / Rail *A clock H is a clock...