MC10195

MC10195 Hex Inverter/Buffer The MC10195 is a Hex Buffer Inverter which is built using six EXCLUSIVE NOR gates. There is a common input to these gates which when placed low or left open allows them to act as inverters. With the common input connected to a high logic level the MC10195 is a hex buffer, useful for high fanout clock driving and reducing stub lengths on long bus lines. PD = 200 mW typ/pkg (No Load) tpd = 2.8 ns typ (B–Q) tpd = 3.8 ns typ (A–Q) tr, tf = 2.5 ns typ (20%–80%) 9 5 A B http://onsemi.com MARKING DIAGRAMS 16 CDIP–16 L SUFFIX CASE 620 1 16 PDIP–16 P SUFFIX CASE 648 1 MC10195P AWLYYWW 1 10195 AWLYYWW MC10195L AWLYYWW LOGIC DIAGRAM Q 2 6 3 PLCC–20 FN SUFFIX CASE 775 7 4 www.DataSheet4U.com 10 13 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week 1 1 14 DIP PIN ASSIGNMENT VCC1 Q1 Q2 Q3 B1 B2 B3 VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 Q6 Q5 Q4 B6 B5 B4 A 12 15 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 TRUTH TABLE Inputs A L L H H B L H L H Output Q H L L H Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D). ORDERING INFORMATION Device MC10195L MC10195P MC10195FN Package CDIP–16 PDIP–16 PLCC–20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / Rail © Semiconductor Components Industries, LLC, 2002 1 January, 2002 – Rev. 7 Publication Order Number: MC10195/D MC10195 ELECTRICAL CHARACTERISTICS Test Limits Pin ...