MC10E1652

MC10E1652 5V, -5V Dual ECL Output Comparator with Latch The MC10E1652 is fabricated using ON Semiconductor’s advanced MOSAIC III process and is output compatible with 10H logic devices. In addition, the device is available in a 20-pin surface mount package. However, the MC10E1652 provides user programmable hysteresis. The latch enable (LENa and LENb) input pins operate from standard ECL 10H logic levels. When the latch enable is at a logic high level, the MC10E1652 acts as a comparator; hence, Q will be at a logic high level if V1 > V2 (V1 is more positive than V2). Q is the complement of Q. When the latch enable input goes to a low logic level, the outputs are latched in their present state, providing the latch enable setup and hold time constraints are met. The level of input hysteresis is controlled by applying a bias voltage to the HYS pin. Features Typical 3.0 dB Bandwidth > 1.0 GHz Typical V to Q Propagation Delay of 775 ps Typical Output Rise/Fall of 350 ps Co...