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MC10EL34

ON Semiconductor

Clock Generation Chip

MC10EL34, MC100EL34 5 V ECL P2, P4, P8 Clock Generation Chip Description The MC10/100EL34 is a low skew ÷2, ÷4, ÷8 cloc...


ON Semiconductor

MC10EL34

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Description
MC10EL34, MC100EL34 5 V ECL P2, P4, P8 Clock Generation Chip Description The MC10/100EL34 is a low skew ÷2, ÷4, ÷8 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The common enable (EN) is synchronous so that the internal dividers will only be enabled/disabled when the internal clock is already in the LOW state. This avoids any chance of generating a runt clock pulse on the internal clock when the device is enabled/disabled as can happen with an...




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